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Content Provider | ACM Digital Library |
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Author | Young, Evangeline F.Y. Tang, Wai-Chung Lam, Ka Chun |
Abstract | As the sizes of modern circuits become bigger and bigger, implementing those large circuits into FPGA becomes arduous. The state-of-the-art academic FPGA place-and-route tool, VPR, has good quality but needs around a whole day to complete a placement when the input circuit contains millions of lookup tables, excluding the runtime for routing. To expedite the placement process, we propose a routability-driven placement algorithm for FPGA that adopts techniques used in ASIC global placer. Our placer follows the lower-bound-and-upper-bound iterative optimization process in ASIC placers like Ripple. In the lower-bound computation, the total HPWL, modeled using the Bound2Bound net model, is minimized using the conjugate gradient method. In the upper-bound computation, an almost-legalized result is produced by spreading cells linearly in the placement area. Those positions are then served as fixed-point anchors and fed into the next lower-bound computation. Furthermore, global routing will be performed in the upper-bound computation to estimate the routing segment usage, as a mean to consider congestion in placement. We tested our approach using 20 MCNC benchmarks and 4 large benchmarks for performance and scalability. Experimental results show that based on the island-style architecture which VPR is most optimized for, our approach can obtain a placement result 8x faster than VPR with 2% more in channel width, or 3x faster with 1% more in channel width when congestion is being considered. Our approach is even 14x faster than VPR in placing large benchmarks with over 10,000 lookup tables, with only 7% more in channel width. |
Starting Page | 242 |
Ending Page | 242 |
Page Count | 1 |
ISBN | 9781450326711 |
DOI | 10.1145/2554688.2554711 |
Language | English |
Publisher | Association for Computing Machinery (ACM) |
Publisher Date | 2014-02-26 |
Publisher Place | New York |
Access Restriction | Subscribed |
Subject Keyword | Routability-driven Fpga Placement |
Content Type | Text |
Resource Type | Article |
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