NDLI: Tunnel Dielectric Field-Effect Transistors with High Peak-to-Valley Current Ratio

Content Provider	Springer Nature Link
Author	Jiang, Zhi Zhuang, Yiqi Li, Cong Wang, Ping
Copyright Year	2016
Abstract	We present silicon-compatible tunnel dielectric field-effect transistors with strong negative differential resistance. On-state tunneling currents have been improved and fully suppressed ambipolarity with lowest subthreshold slope (SS) 10 mV/dec. In addition to the TFET mode, our device works as the negative transconductance characteristic that produces a high current peak-to-valley current ratio (PVR) (up to 10$^{7}$). Numerical simulations demonstrate the impact of tunnel dielectric layer thickness, gate oxide thickness and temperature on the PVR. With the significant improvement in SS, on-state current and high PVR, this tunnel dielectric transistor provides an effective technique for enhancing the drive current, and realizes its applications in logic and memory circuits.
Starting Page	1088
Ending Page	1092
Page Count	5
File Format	PDF
ISSN	03615235
Journal	Journal of Electronic Materials
Volume Number	46
Issue Number	2
e-ISSN	1543186X
Language	English
Publisher	Springer US
Publisher Date	2016-11-03
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Tunnel dielectric field-effect transistors (TD-FET) negative differential resistance subthreshold slope (SS) peak-to-valley current ratio (PVR) Optical and Electronic Materials Characterization and Evaluation of Materials Electronics and Microelectronics, Instrumentation Solid State Physics
Content Type	Text
Resource Type	Article
Subject	Materials Chemistry Electronic, Optical and Magnetic Materials Condensed Matter Physics Electrical and Electronic Engineering

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