NDLI: Highly accurate capacitor-free LDO with sub-1 V −120 dB PSRR bandgap voltage reference

Content Provider	IET Digital Library
Author	Abbasizadeh, H. Hayder, A. S. Lee, K. Y.
Abstract	A low dropout (LDO) voltage regulator operated at 5 V power supply, along with a bandgap reference (BGR) voltage circuit with high power-supply rejection ratio (PSRR) is introduced. In the suggested LDO circuit, a low-pass filter for creating a common gate to transmit supply voltage to the power transistor gate is used. During deployment of the RC filter, an artificial resistor with a value of infinity is utilised, which in addition to reduce the chip occupied area, improves the performance of the low-pass filter at frequencies close to DC, and thus improves the PSRR at these frequencies. In addition, the high PSRR of the circuit is mediated by a low-voltage current mode regulator at the heart of the bandgap circuitry, which isolates the bandgap voltage from power supply variations and noise. The isolating current mirrors create an internal regulated voltage (V reg) for BGR core and op-amp rather than the V DD. These current mirrors reduce the impact of supply voltage variations. The circuit topology is discussed and simulation results are provided. The LDO is also stable without an output capacitor.
Starting Page	1323
Ending Page	1325
Page Count	3
ISSN	00135194
Volume Number	52
e-ISSN	1350911X
Issue Number	Issue 15, Jul (2016)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/el/52/15
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/el.2016.0193
Journal	Electronics Letters
Publisher Date	2016-06-27
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	Artificial Resistor Bandgap Circuitry Bandgap Reference Voltage Circuit BGR Core Capacitor-free LDO Circuit Topology Energy Gap Filter And Other Network Low Dropout Voltage Regulator Low-pass Filter Low-voltage Current Mode Regulator Op-amp Power Electronics Power Supply Power Supply Circuit Power Transistor Gate Power-supply Rejection Ratio PSRR Bandgap Voltage Reference RC Circuit RC Filter Reference Circuit Supervisory Circuit Supply Voltage Variations Voltage 1 V Voltage 5 V Voltage Regulators
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Power-area-efficient transient-improved capacitor-free FVF-LDO with digital detecting technique

Stability analysis and experimental validation of the supercapacitor-assisted low-dropout regulator

A 0.38 V near/sub-V T digitally controlled low-dropout regulator with enhanced power supply noise rejection in 90 nm CMOS process

0.45-V 5.4-nW switched-capacitor bandgap reference with intermittent operation and improved supply immunity

LDO compensation with variable Miller series resistance

Ultralow-power fast-transient output-capacitor-less low-dropout regulator with advanced adaptive biasing circuit

A Sub-1 V Transient-Enhanced Output-Capacitorless LDO Regulator With Push–Pull Composite Power Transistor

1V relaxation oscillator with integrated voltage and current reference

Ultra-low-power, high PSRR CMOS voltage reference with negative feedback

Highly accurate capacitor-free LDO with sub-1 V −120 dB PSRR bandgap voltage reference

Similar Documents

Power-area-efficient transient-improved capacitor-free FVF-LDO with digital detecting technique

Stability analysis and experimental validation of the supercapacitor-assisted low-dropout regulator

A 0.38 V near/sub-V T digitally controlled low-dropout regulator with enhanced power supply noise rejection in 90 nm CMOS process

0.45-V 5.4-nW switched-capacitor bandgap reference with intermittent operation and improved supply immunity

LDO compensation with variable Miller series resistance

Ultralow-power fast-transient output-capacitor-less low-dropout regulator with advanced adaptive biasing circuit

A Sub-1 V Transient-Enhanced Output-Capacitorless LDO Regulator With Push–Pull Composite Power Transistor

1V relaxation oscillator with integrated voltage and current reference

Ultra-low-power, high PSRR CMOS voltage reference with negative feedback

Highly accurate capacitor-free LDO with sub-1 V −120 dB PSRR bandgap voltage reference