NDLI: 0.97 mW/Gb/s, 4 Gb/s CMOS clock and data recovery IC with dynamic voltage scaling

Content Provider	IET Digital Library
Author	Byun, Sangjin
Abstract	This paper presents a low-power complementary metal–oxide–semiconductor (CMOS) clock and data recovery (CDR) integrated circuit (IC) with dynamic voltage scaling (DVS) technique. When DVS is adopted, the power efficiency can be improved by selecting the low supply voltage as possible for a given bit rate. However, the supply voltage generated from a switching regulator such as a buck converter has the ripple voltage at the switching frequency so that the CDR performance may be degraded accordingly. Thus, in this study, the analysis on the relationship among the ripple voltage, the switching frequency and the jitter tolerance (JTOL) is carried out and the appropriate ripple voltage and switching frequency of the buck converter are chosen based on the analysis. Moreover, low supply voltage circuit techniques are carefully utilised for the design of the low-power CDR IC. The CDR IC, implemented in a 0.11 μm CMOS process, shows the power efficiency of 0.97 mW/Gb/s at 4 Gb/s including the buck converter. When 4 Gb/s 231−1 pseudorandom binary sequence is used, the measured bit error rate is better than 10−12, the measured JTOL is 0.3 UIpp and the measured jitter of the recovered clock is 6.1 psrms.
Starting Page	220
Ending Page	228
Page Count	9
ISSN	1751858X
Volume Number	10
e-ISSN	17518598
Issue Number	Issue 3, May (2016)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/iet-cds/10/3
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/iet-cds.2015.0138
Journal	IET Circuits, Devices & Systems
Publisher Date	2016-05-01
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	Bit Error Rate Bit Rate 4 Gbit/s Buck Converter Clock And Data Recovery Clock And Data Recovery Circuit CMOS Integrated Circuit Complementary Metal-oxide-semiconductor Integrated Circuit DC-DC Power Converter DVS Dynamic Voltage Scaling Electrical/electronic Equipment Energy Utilisation Error Statistics Jitter Tolerance Low Power Electronics Low Supply Voltage Circuit Low-power CMOS Integrated Circuit Power Electronics Power Supply Probability Theory Pseudorandom Binary Sequence Random Sequence Ripple Voltage Size 0.11 Mum Statistics Stochastic Linearised SCUC Supervisory Circuit Supply Voltage Generation Switching Circuit Switching Regulator Timing Jitter
Content Type	Text
Resource Type	Article
Subject	Control and Systems Engineering Electrical and Electronic Engineering

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