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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Becker, T. Qiwei Jin Luk, W. Weston, S. |
| Copyright Year | 2011 |
| Abstract | This paper explores the reconfiguration of slowly changing constants in an explicit finite difference solver for option pricing. Numerical methods for option pricing, such as finite difference, are computationally very complex and can be aided by hardware acceleration. Such hardware implementations can be further improved by specialising the circuit for constants, and reconfiguring the circuit when the constants change. In this paper we demonstrate how this concept can be applied to the pricing of European and American options. We present an analytical optimisation approach that explores the benefit of specialised designs over a static one. The key to this approach is the performance and area estimation of kernels that is based on the parameters of arithmetic operators inside the kernel. This allows us to quickly explore several design options without building full designs. Our experimental results on a Xilinx XC6VLX760 FPGA show that with a partially reconfigurable design performance can be improved by a factor of 4.7 over a design without reconfiguration. |
| Starting Page | 176 |
| Ending Page | 181 |
| File Size | 203200 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781457717345 |
| e-ISBN | 9780769545516 |
| DOI | 10.1109/ReConFig.2011.29 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2011-11-30 |
| Publisher Place | Mexico |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Performance evaluation explicit finite difference FPGA Europe run-time reconfiguration Pricing constant specialisation Hardware Mathematical model option pricing Equations Field programmable gate arrays |
| Content Type | Text |
| Resource Type | Article |
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