NDLI: Module miniaturization by ultra thin package stacking

Content Provider	IEEE Xplore Digital Library
Author	Löher, T. Schütze, D. Ostmann, A. Aschenbrenner, R.
Copyright Year	2010
Description	Author affiliation: Fraunhofer IZM, Gustav Meyer Allee 25, 13355 Berlin, German (Ostmann, A.; Aschenbrenner, R.) \|\| Technische Universität Berlin, Gustav Meyer Allee 25, 13355 Berlin, German (Löher, T.; Schütze, D.)
Abstract	The scope of the European project TIPS (Thin Interconnected Package Stacks) is the fabrication of ultra thin packages for electronic components and the subsequent stacking and interconnection of those packages to form highly compact modules. In the first part of this paper approaches to fabricate ultra thin 10 × 10 mm packages by embedding technologies for chips into printed circuit board environments will be discussed. Technologies for commercial flexible printed circuit board substrates (polyimide sandwiched in Cu layers) and respective fabrication processes are used. After initial patterning of the Cu the chips are die bonded to the flex substrates and subsequently lamination into build up layers. Electrical contact between the chip and a fan out routing on the outer layer of the package are made by micro via formation, electroplating and wet chemical structuring of the metal layers. The thickness of the embedded components is constricted to 50 µm in order to constrain the package thicknesses to a maximum of 100 µm with this approach. Packages are fabricated in batches of 150 × 150 mm sheets of flex substrates. Stacking of individual packages can be performed in an automated package by package placement process using a frame as alignment tool and typical flexible printed circuit boards adhesives. In this way only known-good-packages are stacked in order to minimize yield loss. However, a more straight forward process is stacking of the packages using fabrication batches and established multilayer printed circuit board technologies. The disadvantage is the potential yield loss if one of the packages in a stacked layer is faulty. For either type of stacking process the individual stacks have to be milled out of the stack fabrication batch. After stacking and sound mechanical interconnection the electronic interconnection between layers is made by the sequence mechanical through hole drilling, plating and wet chemical structuring. Test issues, design considerations and results of first fabrication runs will be presented and discussed.
Starting Page	1
Ending Page	4
File Size	544403
Page Count	4
File Format	PDF
ISBN	9781424475933
e-ISBN	9781424475940
DOI	10.1109/CPMTSYMPJ.2010.5679546
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-08-24
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Fabrication Lamination Stacking Printed circuits Integrated circuit interconnections Copper Reliability
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Module miniaturization by ultra thin package stacking

Stacking of ultra-thin film packages

A system-on-package module by embedding a mobile TV IC in printed-circuit-board

Integrated Ultra Thin Flexible Inductors for Low Power Converters

Enabling Electronics With Physically Flexible ICs and Hybrid Manufacturing

New generation interconnection technology: printed circuit boards with integrated optical layers

3D interconnection for ultra-dense multichip modules

Advanced module packaging method

High-density printed circuit board using B/sup 2/it/sup TM/ technology

Module miniaturization by ultra thin package stacking

Similar Documents

Module miniaturization by ultra thin package stacking

Stacking of ultra-thin film packages

A system-on-package module by embedding a mobile TV IC in printed-circuit-board

Integrated Ultra Thin Flexible Inductors for Low Power Converters

Enabling Electronics With Physically Flexible ICs and Hybrid Manufacturing

New generation interconnection technology: printed circuit boards with integrated optical layers

3D interconnection for ultra-dense multichip modules

Advanced module packaging method

High-density printed circuit board using B/sup 2/it/sup TM/ technology

Module miniaturization by ultra thin package stacking