NDLI: Stray inductance estimation with detailed model of the IGBT module

Content Provider	IEEE Xplore Digital Library
Author	Popova, L. Juntunen, R. Musikka, T. Lohtander, M. Silventoinen, P. Pyrhonen, O. Pyrhonen, J.
Copyright Year	2013
Description	Author affiliation: Lappeenranta Univ. of Technol., Lappeenranta, Finland (Popova, L.; Juntunen, R.; Musikka, T.; Lohtander, M.; Silventoinen, P.; Pyrhonen, O.; Pyrhonen, J.)
Abstract	Stray inductances cause various problems in a power inverter and should be appraised and minimized at an early design stage to avoid later required countermeasures and redesign after the device prototype has been built. The stray inductances of the commutation loops of an Active Neutral Point Clamped (ANPC) inverter are estimated in this paper. Detailed model of the Insulated Gate Bipolar Transistor (IGBT) module is created to improve the accuracy of the stray inductance calculation. The influence of the coupling between the IGBT modules and between the IGBT modules and the busbars on the commutation loop inductance is considered. The partial inductances of the components of the commutation loops are estimated by AnSYS Q3D parasitic extractor to calculate the total stray inductance. It is found that the commutation loop inductances of the studied ANPC inverter are overestimated by neglecting the couplings between the IGBT modules and between the IGBT modules and the busbars.
Starting Page	1
Ending Page	8
File Size	1519294
Page Count	8
File Format	PDF
ISBN	9781479901166
DOI	10.1109/EPE.2013.6631852
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-09-02
Publisher Place	France
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Insulated gate bipolar transistors Couplings Inductance Device modelling IGBT Parasitics EMC/EMI Capacitors Bus bar Estimation Switches Inverters
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

The large-size low-stray-parameter planar bus bar for high power IGBT-based inverters

Improvement of IGBT model characterization with experimental tests

Improvement for planar bus bars of high power inverters based on segmented evaluation of stray parameters

Layout of IGBT-based Current Source Converter for low stray inductance

Low EMI noise techniques of the $6^{th}$ generation IGBT module

Parasitics considerations for gate drive of IGBT

Parasitics consideration of layout design within IGBT module

Effects of stray inductance on switching transients of an IGBT propulsion inverter and resulting gate control strategies

Stray Inductance Reduction of Commutation Loop in the P-cell and N-cell-Based IGBT Phase Leg Module

Stray inductance estimation with detailed model of the IGBT module

Similar Documents

The large-size low-stray-parameter planar bus bar for high power IGBT-based inverters

Improvement of IGBT model characterization with experimental tests

Improvement for planar bus bars of high power inverters based on segmented evaluation of stray parameters

Layout of IGBT-based Current Source Converter for low stray inductance

Low EMI noise techniques of the $6^{th}$ generation IGBT module

Parasitics considerations for gate drive of IGBT

Parasitics consideration of layout design within IGBT module

Effects of stray inductance on switching transients of an IGBT propulsion inverter and resulting gate control strategies

Stray Inductance Reduction of Commutation Loop in the P-cell and N-cell-Based IGBT Phase Leg Module

Stray inductance estimation with detailed model of the IGBT module