NDLI: Short fail-safe capability and fault diagnosis strategies dedicated to a reconfigurable 5-level double-boost PFC

Content Provider	IEEE Xplore Digital Library
Author	Thi Thuy Linh Pham Richardeau, F. Gateau, G.
Copyright Year	2011
Description	Author affiliation: Université de Toulouse; INP, UPS; LAPLACE, (Laboratoire Plasma et Conversion d'Energie); ENSEEIHT, 2 rue Charles Camichel, BP 7122, F-31071 Toulouse cedex 7, France (Thi Thuy Linh Pham; Richardeau, F.; Gateau, G.)
Abstract	A new 5-level reconfigurable PFC topology with low energy short-failure capability and fast fault-diagnosis is proposed. It includes a 2-stacked low energy 3-level Fly-Cap Boost through two input low frequency rectifiers. 600V–30kHz devices in series pear stack allow one short-fault for transistor and up to two short-faults for diodes. Firstly, authors shows for the first time the low ageing drift and the great stability of the parasite short-failure resistance (Rsc) of failed CoolMos™ transistors and SiC diodes inside well known epoxy molded package (TO220/TO247/TO3P cases). Secondly, two fault-diagnosis strategies are presented: one directly monitors the voltages across the flying capacitors to detect and to localize the faulty switch by means of two sensors; other is based on a harmonic detection (magnitude and phase-shift) at the switching frequency through only one voltage sensor at the input of the PFC. All these strategies are analyzed and simulated with the efficient PD-PWM technique that exhibits a lower THD of the leg-leg input voltage for three-phase application. The design and the most important features are highlighted thanks to a digital control frame and a single-phase mock-up rated to AC115V–DC400V — 4kW–4×31kHz.
Starting Page	1
Ending Page	10
File Size	2978672
Page Count	10
File Format	PDF
ISBN	9781612841670
e-ISBN	9789075815146
e-ISBN	9789075815153
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-08-30
Publisher Place	United Kingdom
Access Restriction	Subscribed
Rights Holder	EPE ASSOCIATION
Subject Keyword	Electric breakdown Diagnostics Capacitors Power Factor Correction Switches Aging Multilevel Converter Sensors Topology Voltage control Fault Tolerance
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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