NDLI: Compact device modeling for established and emerging technologies with the Qucs GPL circuit simulator

Content Provider	IEEE Xplore Digital Library
Author	Brinson, M.E. Jahn, S.
Copyright Year	2009
Description	Author affiliation: Faculty of Computing, London Metropolitan University, UK (Brinson, M.E.)
Abstract	Current trends in circuit simulation technology suggest a strong movement towards software packages which promote equation-defined compact semiconductor device modeling and circuit macromodeling. Today, the Verilog-A subset of the Verilog-AMS hardware description language is one of the most popular choices of hardware description language for model construction. The “Quite universal circuit simulator” (Qucs) is a GPL software package supporting the MOS-AK Verilog-A standardization initiative. This paper outlines how equation centered modeling can act as a strong support vehicle for the construction of new device models and circuit macromodels. The material presented in the text explores the relationship between device model specifications, equation-defined devices and Verilog-A code generation. A number of examples demonstrate the capabilities of the model construction tools implemented by the Qucs development team.
Starting Page	39
Ending Page	44
File Size	722654
Page Count	6
File Format	PDF
ISBN	9781424447985
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-06-25
Publisher Place	Poland
Access Restriction	Subscribed
Rights Holder	Tech Univ of Lodz
Subject Keyword	Integrated circuit technology Nonlinear equations compact semiconductor models Circuit simulation equation-defined device modeling Circuit testing Vehicles Semiconductor device modeling Software packages Quite universal circuit simulator (Qucs) circuit macromodels SPICE Hardware design languages Integrated circuit modeling Verilog-A
Content Type	Text
Resource Type	Article

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