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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Moradi, F. Wisland, D.T. Mahmoodi, H. Tuan Vu Cao Zarre Dooghabadi, M. |
| Copyright Year | 2009 |
| Description | Author affiliation: Nanoelectronics Group, Department of Informatics, University of Oslo, NO-0316, NORWAY (Moradi, F.; Wisland, D.T.; Tuan Vu Cao; Zarre Dooghabadi, M.) || School of Engineering San Francisco State University, 1600 Holloway Avenue, CA 94132, USA (Mahmoodi, H.) |
| Abstract | In this paper a new circuit design technique using forward body biasing is presented. This technique may be employed in different circuits (e.g. logic gates, SRAM, high fan-in circuits). The advantages of this technique are reduced power dissipation and increased speed for domino logic circuits. Furthermore this technique is used to control the SRAM supply voltage, where the benefit is increased write margin. The simulation results show a significant decrease in power dissipation especially in high fan-in logic circuits. |
| Starting Page | 215 |
| Ending Page | 219 |
| File Size | 482792 |
| Page Count | 5 |
| File Format | |
| ISBN | 9781424447985 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-06-25 |
| Publisher Place | Poland |
| Access Restriction | Subscribed |
| Rights Holder | Tech Univ of Lodz |
| Subject Keyword | Random access memory Voltage control SRAM MOS devices Nanoelectronics Logic circuits high fan-in MOSFET circuits write margin CMOS technology low power Threshold voltage Power dissipation Informatics |
| Content Type | Text |
| Resource Type | Article |
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