NDLI: Towards Smaller-Sized Cache for Mobile Processors Using Shared Set-Associativity

Content Provider	IEEE Xplore Digital Library
Author	Davanam, N. Byeong Kil Lee
Copyright Year	2010
Abstract	As multi-core trends are becoming dominant, cache structures are complicated and bigger shared level-2 caches are demanded. Also, in mobile processors, multi-core design is being applied. To achieve higher cache performance, lower power consumption and smaller chip area in multi-core mobile processors, cache configuration should be re-organized and re-analyzed. The MID (Mobile Internet Devices) which are embedding mobile processors are becoming one of major platforms and demanding to have a capability to run more general-purpose workload in new platforms (eg., Netbook). In this paper, we proposed a novel cache mechanism to provide performance improvement without increasing cache memory size. Most of applications (workloads) have spatial locality in cache behaviors which means small boundary of cache locations tend to be used in a given piece of time. Considering this concept of locality reversely, logically farthest sets will have relatively lower correlation in terms of locality. The possibility that these two sets are used in same basic block would be very low. With this observation, we investigate the feasibility of sharing two sets of cache blocks for data fill and replacement within a cache. By sharing the sets, certain amount of acceptable performance improvement could be expected without increasing cache size. Based on our simulation with sampled SPEC CPU2000 workloads, the proposed cache mechanism shows average reduction in cache miss rate up to 8.5% (depending on cache size and baseline set associativity), compared to the baseline cache.
Starting Page	1
Ending Page	6
File Size	405474
Page Count	6
File Format	PDF
ISBN	9781424462704
e-ISBN	9781424462711
DOI	10.1109/ITNG.2010.120
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-04-12
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Process design Energy consumption Multicore processing Cooling caches Cache memory Information technology performance Heating computer architecture Hardware Internet Mobile computing
Content Type	Text
Resource Type	Article

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