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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Yen-Chi Lee Jyi-Tsong Lin |
| Copyright Year | 2015 |
| Description | Author affiliation: Dept. of Electr. Eng., Nat. Sun Yat Sen Univ., Kaohsiung, Taiwan (Jyi-Tsong Lin) || R&D Dept., Adv. Semicond. Eng., Kaohsiung, Taiwan (Yen-Chi Lee) |
| Abstract | Stealth Dicing (SD) technology has high potential to replace the conventional blade sawing and laser grooving. The dicing method has been widely researched since 2005 [1-3] especially for thin wafer (⇐ 12 mils). SD cutting has good quality because it has dry process during laser cutting, extremely narrow scribe line and multi-die sawing capability. However, along with complicated package technology, the chip quality demands fine and accurate pitch which conventional blade saw is impossible to achieve. This paper is intended as an investigation in high performance SD sawing, including multi-pattern wafer and DAF dicing tape capability. With the improvement of low-K substrate technology and min chip scale size, SD cutting is more important than other methods used before. Such sawing quality also occurs in wafer level chip scale package. With low-K substrate and small package, the SD cutting method can cut the narrow scribe line easily (15 um), which can lead the WLCSP to achieve more complicated packing method successfully. |
| Starting Page | 348 |
| Ending Page | 350 |
| File Size | 1025276 |
| Page Count | 3 |
| File Format | |
| ISBN | 9781467396905 |
| e-ISBN | 9781467383561 |
| DOI | 10.1109/IMPACT.2015.7365231 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2015-10-21 |
| Publisher Place | Taiwan |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Cooling Blades Films Sawing Silicon Substrates |
| Content Type | Text |
| Resource Type | Article |
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