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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Hird, K. Parker, K.P. Follis, B. |
| Copyright Year | 2002 |
| Description | Author affiliation: Agilent Technol., Loveland, CO, USA (Hird, K.; Parker, K.P.; Follis, B.) |
| Abstract | Characterizing board test coverage as a percentage of devices or nodes having tests does not accurately portray coverage, especially in a limited access testing environment that today includes a variety of diverse testing approaches from visual and penetrative inspection to classical in-circuit test. A better depiction of test coverage is achieved by developing a list of potential defects referred to as the defect universe, where the capabilities of the chosen test strategy are not considered in development of this defect list. Coverage is measured by grading the capabilities of each test process against the defect universe. The defect universe is defined to be meaningful to the bulk of the electronics industry and to provide a consistent framework for coverage metrics and comparisons. |
| Sponsorship | IEEE Comput. Soc. Test Technol. Tech. Council IEEE Philadelphia Sect |
| Starting Page | 1066 |
| Ending Page | 1074 |
| File Size | 589509 |
| Page Count | 9 |
| File Format | |
| ISBN | 0780375424 |
| ISSN | 10893539 |
| DOI | 10.1109/TEST.2002.1041863 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2002-10-10 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Inspection Electronic equipment testing Soldering Resistors Pins Hardware Capacitors Polarization |
| Content Type | Text |
| Resource Type | Article |
| Subject | Applied Mathematics Electrical and Electronic Engineering |
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