NDLI: Programmable pacing channel with a fully on-chip LDO regulator for cardiac pacemaker

Content Provider	IEEE Xplore Digital Library
Author	Chih-Jen Cheng Chung-Jui Wu Shuenn-Yuh Lee
Copyright Year	2008
Description	Author affiliation: Dept. of Electr. Eng., Nat. Chung-Cheng Univ., Chia-Yi (Chih-Jen Cheng; Chung-Jui Wu; Shuenn-Yuh Lee)
Abstract	A novel dual-voltage pacing system for implant pacemaker is presented in this paper. In order to reduce supply voltage ripple and diminish process variation imposed on the divided-resistor, a fully on-chip low-dropout (LDO) regulator is proposed. Meanwhile, the adjustable pacing circuit together with a sense feedback is employed to deliver electrical stimuli of 16-step amplitudes to induce cardiac contraction. The pacing circuit with a LDO regulator was fabricated in TSMC 0.35-mum CMOS technology, consuming total power of 1.29 muW including 185 nA of ground current in 1.2-V LDO and having a power consumption of 30 nW in the 1-V pacing step controller. Experimental results demonstrate that the proposed LDO regulator features a power-supply rejection ratio (PSRR) of -30 dB with the output ripple of 570 $muV_{pp}$ under the input sinusoidal wave of 19.6 $mV_{pp}.$ Even with the load current up to 10 muA, LDO yields a line regulation that is less than 3% deviation.
Starting Page	285
Ending Page	288
File Size	316061
Page Count	4
File Format	PDF
ISBN	9781424426041
DOI	10.1109/ASSCC.2008.4708783
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-11-03
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Regulators Pacemakers Voltage Feedback Implants CMOS technology Timing Digital circuits Capacitors Pulse amplifiers
Content Type	Text
Resource Type	Article

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