NDLI: Foreword

Content Provider	IEEE Xplore Digital Library
Author	Yoo, H.-J.
Copyright Year	2008
Description	Author affiliation: Dept. of EECS, KAIST (Yoo, H.-J.)
Abstract	Welcome to A-SSCC 2008, the fourth Asian Solid-State Circuits Conference, in Fukuoka Japan. Since it was founded 4 years ago to promote circuits and SoC design technology in Asia by the IEEE Solid-State Circuits Society, A-SSCC has been establishing itself as a world prestigious forum for the SoC design in spite of its short history. Initial objective, providing technical contribution to semiconductor design and technology and expanding cooperation and friendship especially in Asia-Pacific regions, seems to be completed far more than expected because many excellent papers and distinguished attendees come from all over the world, not alone from Asia. This year, the conference is held at JAL Resort Sea Hawk Hotel in Fukuoka, Japan, on November 3rd through 5th. I hope you have a great opportunity to learn about the latest advances in this field as well as to meet and interact with other researchers for the future challenges on the SoC here in Asia, the world most dynamic place of semiconductor technology and industry. This year we have 309 papers submitted from 26 different countries around the world, and a thorough review process chooses 116 high-quality papers from 15 different countries including Vietnam and India. I��m proud that the quality of the papers is increasing every year, and all of the accepted papers are based on the real measurement results of their newly fabricated silicon chips. The accepted papers will be presented throughout 16 sessions for two days. Some of the technical papers will be published in special edition of IEEE Journal of Solid-State Circuits (JSSC) next year. In addition, you can experience the excitement of the student real demo of 8 outstanding chip designs at the student design contest (SDC), unique event of A-SSCC comparing with other conferences. SDC selects outstanding designs from the accepted student papers and competes on site by demonstration of their chip operations.
File Size	167650
File Format	PDF
ISBN	9781424426041
DOI	10.1109/ASSCC.2008.4708711
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-11-03
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Content Type	Text

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in