NDLI: Impact of the application activity on intermittent faults in embedded systems

Content Provider	IEEE Xplore Digital Library
Author	Guilhemsang, J. Heron, O. Ventroux, N. Goncalves, O. Giulieri, A.
Copyright Year	2011
Description	Author affiliation: CEA, LIST, 91191, Gif-sur-Yvette CEDEX, France (Guilhemsang, J.; Heron, O.; Ventroux, N.; Goncalves, O.) \|\| LEAT, Université de Nice-Sophia Antipolis, CNRS, 250, rue Albert Einstein, 06560, Valbonne, France (Giulieri, A.)
Abstract	Future embedded systems are going to be more sensitive to hardware faults. In particular, intermittent faults are going to appear faster in future technologies. Understanding the occurrence of faults and their impact on systems and applications can help to improve the fault-tolerance of systems. However, there is no study on their effects in more complex digital circuits. We propose an experimental platform for accelerating and catching the occurrence of intermittent faults in complex digital circuits. We experimentally show that intermittent faults can appear during the lifetime of the circuit, very early before the wear-out period. We studied the impact of processor activity on intermittent faults rate. We conclude that a continuous usage of circuits causes the occurrence of intermittent faults earlier than a low usage under identical operating conditions. We show that applications do not have the same sensitivity to intermittent faults.
Starting Page	191
Ending Page	196
File Size	6114242
Page Count	6
File Format	PDF
ISBN	9781612846576
ISSN	10930167
e-ISBN	9781612846569
DOI	10.1109/VTS.2011.5783782
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-05-01
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Circuit faults Internal stresses Temperature sensors Aging Junctions Human computer interaction FPGA Intermittent faults aging embedded processor cores
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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