NDLI: A scalable volume-confined phase change memory using physical vapor deposition

Content Provider	IEEE Xplore Digital Library
Author	Lai, S.C. Kim, S. BrightSky, M. Zhu, Y. Joseph, E. Bruce, R. Cheng, H.Y. Ray, A. Raoux, S. Wu, J.Y. Wang, T.Y. Cortes, N.S. Lin, C.M. Lin, Y.Y. Cheek, R. Lai, E.K. Lee, M.H. Lung, H.L. Lam, C.
Copyright Year	2013
Description	Author affiliation: IBM/Macronix PCRAM Joint Project, IBM T. J. Watson Res. Center, Yorktown Heights, NY, USA (Kim, S.; BrightSky, M.; Zhu, Y.; Joseph, E.; Bruce, R.; Ray, A.; Raoux, S.; Cortes, N.S.; Cheek, R.; Lam, C.) \|\| Emerging Central Lab., Macronix Int. Co., Ltd., Hsinchu, Taiwan (Lai, S.C.; Cheng, H.Y.; Wu, J.Y.; Wang, T.Y.; Lin, C.M.; Lin, Y.Y.; Lai, E.K.; Lee, M.H.; Lung, H.L.)
Abstract	To improve writing bandwidth for phase change memory (PCM) volume-confined cells are proposed to reduce the reset current [1, 2]. So far, CVD or ALD GST must be used to fill the small hole, with several negative issues. This work proposes and demonstrates a PVD GST volume-confined structure by using an isolation-last process. In our structure, a low aspect ratio (<; 1) trench is created and PVD GST is deposited in the bottom and the sidewalls of the trench uniformly, and then covered by SiN. This protects the GST from etching damage and small VC phase change elements can be fabricated. The electrical characteristics show much reduced reset current and good endurance behavior because of the improved heating efficiency and the congruent melting [3] in VC PCM. PVD GST is much more flexible in materials selection and doping, thus has better scalability because of the ideal PC element size match with the selecting device.
Sponsorship	IEEE Electron Devices Soc.
File Size	1024901
File Format	PDF
ISBN	9781467352260
ISSN	21589682
e-ISBN	9784863483477
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-06-11
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	JSAP
Subject Keyword	Phase change materials Silicon compounds Films Etching Tin Resistance
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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