NDLI: Highly reliable HfSiON CMOSFET with phase controlled NiSi (NFET) and Ni/sub 3/Si (PFET) FUSI gate electrode

Content Provider	IEEE Xplore Digital Library
Author	Terai, M. Takahashi, K. Manabe, K. Hase, T. Ogura, T. Saitoh, M. Iwamoto, T. Tatsumi, T. Watanabe, H.
Copyright Year	2005
Description	Author affiliation: Syst. Devices Res. Labs., NEC Corp., Sagamihara, Japan (Terai, M.; Takahashi, K.; Manabe, K.; Hase, T.; Ogura, T.; Saitoh, M.; Iwamoto, T.; Tatsumi, T.; Watanabe, H.)
Abstract	We have clarified that the Ni/Si composition of gate electrode and Hf/Si composition of HfSiON gate insulator are the important parameter to obtain suitable Vth of CMOS. The amount of Hf-Si bonds at the gate/insulator interface is key parameter to control Fermi-level pinning effect. The crystalline phase controlled full Ni-silicide gate (PC-FUSI) and 50% Hf composition HfSiON realize suitable Vth=+/-0.5V with tight distribution. Performance improvement (NFET:1.28 times and PFET:1.52 times) of PC-FUSI FET was also confirmed against poly-Si gate FET with keeping low leakage current. Sufficient long term reliability was also demonstrated through BT stress evaluation.
Sponsorship	Japan Soc. of Appl. Phys. IEEE Electron Devices Soc
Starting Page	68
Ending Page	69
File Size	374235
Page Count	2
File Format	PDF
ISBN	4900784001
DOI	10.1109/.2005.1469215
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-06-14
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	JSAP
Subject Keyword	CMOSFETs Electrodes Annealing FETs Insulation Crystallization Leakage current CMOS process Hafnium oxide Silicides
Content Type	Text
Resource Type	Article

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