NDLI: A 27 mW 1.1 mm/sup 2/ motion estimator for picture-rate up-converter

Content Provider	IEEE Xplore Digital Library
Author	Beric, A. Sethuraman, R. Peters, H. van Meerbergen, J. de Haan, G. Pinto, C.A.
Copyright Year	2004
Description	Author affiliation: Dept. of Electr. Eng., Eindhoven Univ. of Technol., Netherlands (Beric, A.)
Abstract	The gap between application-specific integrated circuits (ASICs) and general purpose programmable processors in terms of performance, power, cost and flexibility is well known. Application specific instruction set processors (ASIPs) bridge this wide gap. This work presents a design of a very long instruction word (VLIW) based ASIP for motion estimation which is used in the picture-rate up-conversion application. The ASIP meets low-power and low-cost requirements apart from providing flexibility for the application domain. It consumes 27 mW and takes an area of 1.1 mm/sup 2/ in 0.13 /spl mu/m technology for delivering motion estimation functionality for standard definition (SD) sequences at 140 fps. Motion estimator performed single scan, where for each block of 8*8 pixels evaluation is done using the set of five motion vector candidates. The evaluation criterion was the sum-of-absolute-difference (SAD) criterion with the SAD window size of 32 pixels. In order to prove the concept in silicon, an FPGA prototyping system has been used.
Sponsorship	VLSI Soc. of India Minist. of Inf. and Commun. Technol., Gov. of India IEEE Electron Devices Soc. IEEE Circuits and Syst. Soc. Tata Consultancy Services Texas Instruments Inc. Nat. Semiconductor Intel Synopsys Cypress Semiconductor Corp. Infineon Technol. Cadence Conexant
Starting Page	1083
Ending Page	1088
File Size	401180
Page Count	6
File Format	PDF
ISBN	0769520723
DOI	10.1109/ICVD.2004.1261073
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-01-09
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Application specific processors Motion estimation VLIW Application specific integrated circuits Costs Bridge circuits Performance evaluation Silicon Field programmable gate arrays Prototypes
Content Type	Text
Resource Type	Article

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