NDLI: Synthesis of low power high performance dual-V/sub T/ PTL circuits

Content Provider	IEEE Xplore Digital Library
Author	Samanta, D. Pal, A.
Copyright Year	2004
Description	Author affiliation: Dept. of Comput. Sci. & Eng., North Eastern Regional Inst. of Sci. & Technol., Nirjuli, India (Samanta, D.)
Abstract	Although major portion of power dissipation in present generation CMOS circuits (250 nm-180 nm) is due to charging and discharging of various node capacitors, known as switching power, the leakage power is becoming more and more predominant in ultra-deep submicron (UDSM) technologies. In pass-transistor logic (PTL) circuits, the output of each PTL cell is provided with a buffer to reduce delay and restore voltage level. These buffers, in turn, are the primary source of leakage power in PTL circuits. In this paper we have proposed, for the first time, the use of transistors of two threshold voltages (dual-V/sub T/) to minimize leakage power. We have extended our existing algorithm for logic synthesis of dual-V/sub T/ PTL circuits. The extended algorithm has been tested for a large number of ISCAS benchmark circuits. Experimental results show that the use of dual-V/sub T/ leads to a reduction in leakage power of about 45% in active mode and 76% in standby mode compared to their single-V/sub T/ realization. Moreover, total power dissipation reduces by 18% with respect to single-V/sub T/ realizations.
Sponsorship	VLSI Soc. of India Minist. of Inf. and Commun. Technol., Gov. of India IEEE Electron Devices Soc. IEEE Circuits and Syst. Soc. Tata Consultancy Services Texas Instruments Inc. Nat. Semiconductor Intel Synopsys Cypress Semiconductor Corp. Infineon Technol. Cadence Conexant
Starting Page	85
Ending Page	90
File Size	328663
Page Count	6
File Format	PDF
ISBN	0769520723
DOI	10.1109/ICVD.2004.1260907
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-01-09
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Circuit synthesis Power dissipation Logic circuits Circuit testing Power generation Switched capacitor circuits Switching circuits CMOS technology CMOS logic circuits Delay
Content Type	Text
Resource Type	Article

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