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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Jespers, P. |
| Copyright Year | 2004 |
| Description | Author affiliation: Univ. Catholique de Louvain, Belgium (Jespers, P.) |
| Abstract | This article deals about high speed integrated A to D converters. Flash converters achieve A to D conversion in a single clock cycle. They are fast devices by essence but area and power consumption increase exponentially with numbers of bits. Nine to ten-bit converters require large transistor sizes in order to cope with narrow offset tolerances of the comparators. Five to six bit resolution full-flash converters are more customary. Multistep converters take advantage of low-resolution flash devices. Full-flash converters is known as folding converters. The number of comparators is smaller than with full-flash devices to interpolation techniques. A 10-bit CMOS converter with a sample rate of 50 MS/s and 240mW power consumption has been reported. |
| Sponsorship | VLSI Soc. of India Minist. of Inf. and Commun. Technol., Gov. of India IEEE Electron Devices Soc. IEEE Circuits and Syst. Soc. Tata Consultancy Services Texas Instruments Inc. Nat. Semiconductor Intel Synopsys Cypress Semiconductor Corp. Infineon Technol. Cadence Conexant |
| File Size | 224405 |
| File Format | |
| ISBN | 0769520723 |
| DOI | 10.1109/ICVD.2004.1260898 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2004-01-09 |
| Publisher Place | India |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Energy consumption Operational amplifiers Sampling methods Signal generators Clocks Signal resolution Quantization Noise generators Concatenated codes Pipeline processing |
| Content Type | Text |
| Resource Type | Article |
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