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2015 IEEE International Reliability Physics Symposium

2014 IEEE International Reliability Physics Symposium

2013 IEEE International Reliability Physics Symposium (IRPS)

2012 IEEE International Reliability Physics Symposium (IRPS)

2011 International Reliability Physics Symposium

2010 IEEE International Reliability Physics Symposium

2009 IEEE International Reliability Physics Symposium

2008 IEEE International Reliability Physics Symposium

2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual

2006 IEEE International Reliability Physics Symposium Proceedings

2005 IEEE International Reliability Physics Symposium, 2005. Proceedings. 43rd Annual.

2004 IEEE International Reliability Physics Symposium. Proceedings

2004 IEEE International Reliability Physics Symposium. Proceedings (IEEE Cat. No.04CH37533)

2004 IEEE International Reliability Physics Symposium Proceedings 42nd Annual - Title

Table of contents

2005 International Reliability Physics Symposium April 17-21,2005

2005 IEEE International Reliability Physics Symposium - Call for papers and Call for posters

Broad energy distribution of NBTI-induced interface states in p-MOSFETs with ultra-thin nitrided oxide

Negative bias temperature instability in triple gate transistors

Investigation of hot carrier effects in n-MISFETs with HfSiON gate dielectric

Hot carrier degradation in novel strained-Si nMOSFETs

Modeling of NBTI degradation and its impact on electric field dependence of the lifetime

Two concerns about NBTI issue: gate dielectric scaling and increasing gate current

A new waveform-dependent lifetime model for dynamic NBTI in PMOS transistor

Hole trapping effect on methodology for DC and AC negative bias temperature instability measurements in PMOS transistors

SRAM subthreshold current recovery after unipolar AC stressing

Convergence and interaction of BEOL and BE reliability methodology

Thermal cycle reliability of stacked via structures with copper metallization and an organic low-k dielectric

Measurements of effective thermal conductivity for advanced interconnect structures with various composite low-k dielectrics

Impact of off-state leakage current on electromigration design rules for nanometer scale CMOS technologies

Impact of gate-oxide breakdown of varying hardness on narrow and wide nFET's

Off-state mode TDDB reliability for ultra-thin gate oxides: New methodology and the impact of oxide thickness scaling

Acceleration factors and mechanistic study of progressive breakdown in small area ultra-thin gate oxides

Impact of stress induced leakage current on power-consumption in ultra-thin gate oxides

Investigation of circuit-level oxide degradation and its effect on CMOS inverter operation and MOSFET characteristics

Gate dielectric degradation mechanism associated with DBIE evolution

Degradation of ultra-thin oxides with tungsten gates under high voltage: wear-out and breakdown transient

Contention-induced latchup

Model-based guidelines to suppress cable discharge event (CDE) induced latchup in CMOS ICs

The influence of deep trench and substrate resistance on the latchup robustness in a BiCMOS silicon germanium technology

The influence of heavily doped buried layer implants on electrostatic discharge (ESD), latchup, and a silicon germanium heterojunction bipolar transistor in a BiCMOS SiGe technology

Reliability and design qualification of a sub-micron tungsten silicide E-Fuse

A new experimental method for evaluating electric field at the junctions of DRAM cell transistors and the effect of electric field strength on the retention characteristics of DRAM

Characterization of the time-dependent reliability fallout as a function of yield for a 130nm SRAM device and application to optimize production burn-in

PMOS NBTI-induced circuit mismatch in advanced technologies

Reliability assessment of ultra-thin HfO/sub 2/ oxides with TiN gate and polysilicon-n/sup +/ gate

Correlation between Stress-Induced Leakage Current (SILC) and the HfO/sub 2/ bulk trap density in a SiO/sub 2//HfO/sub 2/ stack

Carrier separation analysis for clarifying leakage mechanism in unstressed and stressed HfAlO/sub x//SiO/sub 2/ stack dielectric layers

Magnetoresistive random access memory (MRAM) and reliability

Reliability properties of low voltage PZT ferroelectric capacitors and arrays

Analysis of phase-transformation dynamics and estimation of amorphous-chalcogenide fraction in phase-change memories

Reliability of flash memory erasing operation under high tunneling electric fields

Effects of overlayers on electromigration reliability improvement for Cu/low K interconnects

The improvement of copper interconnect electromigration resistance by cap/dielectric interface treatment and geometrical design

Stress modeling of Cu/low-k BEoL - application to stress migration

Stress-induced voiding in multi-level copper/low-k interconnects

Identification of electromigration dominant diffusion path for Cu damascene interconnects and effect of plasma treatment and barrier dielectrics on electromigration performance

Investigation of reliability problems in thermal inkjet printhead

Calibration and optimization of interconnect based MEMS test structures for predicting thermo-mechanical stress in metallization

Wideband and high reliability RF-MEMS switches using PZT/HfO/sub 2/ multi-layered high K dielectrics

PMOS drain breakdown voltage walk-in: a new failure mode in high power BiCMOS applications

Dynamic positive bias temperature instability characteristics of ultra-thin HfO/sub 2/ NMOSFET

A comprehensive framework for predictive modeling of negative bias temperature instability

Hot-carrier injection in step-drift rf power LDMOSFET

Comparison between neutron-induced system-SER and accelerated-SER in SRAMS

Process impact on SRAM alpha-particle SEU performance

SRAM SER in 90, 130 and 180 nm bulk and SOI technologies

Neutron-induced soft error in logic devices using quasi-monoenergetic neutron beam

Transistor sizing for radiation hardening

Comprehensive reliability evaluation of a 90 nm CMOS technology with Cu/PECVD low-k BEOL

Highly reliable dielectric/metal bilayer sidewall diffusion barrier in Cu/porous organic ultra low-k interconnects

Impact of the barrier/dielectric interface quality on reliability of Cu porous-low-k interconnects

Reliability improvement using buried capping layer in advanced interconnects

TDDB reliability assessments of 0.13 /spl mu/m Cu/low-k interconnects fabricated with PECVD low-k materials

Finding voids in dual damascene Cu vias and their impact on reliability

A new breakdown failure mechanism in HfO/sub 2/ gate dielectric

C-V and C-P characterization sensitivities for fast and slow-state traps in very thin oxide MOSFETs

Thermal Laser Stimulation of active devices in silicon - a quantitative FET parameter investigation

Positive photon discrimination for ultra low voltage IC analysis

Transient-LU failure analysis of the ICs, methods of investigation and computer aided simulations

Structural analysis of integrated circuits using scanning laser ultrasonics

Native-NMOS-triggered SCR (NANSCR) for ESD protection in 0.13-/spl mu/m CMOS integrated circuits

Base pushout driven snapback in parasitic bipolar devices between different power domains

Effects of hot spot hopping and drain ballasting in integrated vertical DMOS devices under TLP stress

Gate dielectric breakdown: A focus on ESD protection

A PMOSFET ESD failure caused by localized charge injection

RF HCI testing methodology and lifetime model establishment

Reliability evaluation and comparison of Class-E and Class-A power amplifiers with 0.18 /spl mu/m CMOS technology

Effects of hot-carrier stress on the performance of CMOS Low Noise Amplifier

RF S-parameter degradation under hot carrier stress

6-T cell circuit dependent GOX SBD model for accurate prediction of observed vccmin test voltage dependency

A methodology for accurate assessment of soft-broken gate oxide leakage and the reliability of VLSI circuits

A chip and pixel qualification methodology on imaging sensors

Hot-carrier stress induced low-frequency noise degradation in 0.13 /spl mu/m and 0.18 /spl mu/m RF CMOS technologies

Qualification method for DRAM retention by leakage current evaluation using subthreshold characteristics of cell transistors

Hot carrier reliability of a SiGe/Si hetero-interface in SiGe MOSFETs

Enhanced hot-electron performance of strained Si NMOS over unstrained Si

Degradation mechanism of GaAs PHEMT power amplifiers under elevated temperature lifetest with RF-overdrive

Bipolar SCR ESD protection in a 0.25 /spl mu/m Si-Ge process using subcollector region modification

Failure mechanisms of GaN-based LEDs related with instabilities in doping profile and deep levels

Integration issues of high-k gate stack: Process-induced charging

Impact of gate sidewall spacer structures on DRAM cell transistors under Fowler-Nordheim and gate-induced drain leakage stress conditions

Pattern density effect of trench isolation-induced mechanical stress on device reliability in sub-0.1/spl mu/m technology

Investigation of misfit dislocation leakage in supercritical strained silicon MOSFETs

A low cost test vehicle for embedded DRAM capacitor: Investigation and monitoring of the process

Characterization and reliability of TaN thin film resistors

Statistical analysis of nanocrystal memory reliability

A new channel percolation model for V/sub T/ shift in discrete-trap memories

Cause of erase speed degradation during two-bit per cell operation of a trapping nitride storage flash memory cell

Retention loss characteristics of localized charge-trapping devices

Electrical fails specific to Pressure Cooker Test

Degradation mechanisms of siloxane-based thermal interface materials under reliability stress conditions

Dendrite fuse re-growth kinetics on organic substrates for microprocessors

Effect of vacuum on high-temperature degradation of gold/aluminum wire bonds in PEMs

Packaging effect on reliability for Cu/low k structures

Detection of tin plating and tin whisker mitigation

Electromigration reliability enhancement of flip chip interconnects using Cu-doped SnPb solder

Reliability and microstructure of lead-free solder die attach interface in silicon power devices

Interfacial degradation mechanism of Au-Al bonding in quad flat package

Analysis of leakage mechanisms and leakage pathways in intra-level Cu interconnects

Reliability of silicon nitride dielectric-based metal-insulator-metal capacitors

The impact of process optimization on planar THz-Schottky device reliability

A study of output power stability of GaN HEMTs on SiC substrates

Lifetime projections and conduction mechanisms for Hafnium based high-k capacitor dielectrics using low thermal budget process

Direct determination of interface and bulk traps in stacked HfO/sub 2/ dielectrics using charge pumping method

Structure of the breakdown spot during progressive breakdown of ultra-thin gate oxides

Influence of charge trapping on AC reliability of high-k dielectrics

Effects of thin SiN interface layer on transient I-V characteristics and stress induced degradation of high-k dielectrics

Drain biased TDDB lifetime model for ultra thin gate oxide

Polarity dependence of charge trapping in poly-silicon gate HfO/sub 2/ MOSFETs

Gate oxide multiple soft breakdown (Multi-SBD) impact on CMOS inverter

Effects of gate electrodes and barrier heights on the breakdown characteristics and Weibull slopes of HfO/sub 2/ MOS devices

Charge trapping and device performance degradation in MOCVD hafnium-based gate dielectric stack structures

The last trap that form the percolation path - the stress voltage effect

Frequency dependent dynamic charge trapping in HfO/sub 2/ and threshold voltage instability in MOSFETs

Chip-level ESD simulation for fail detection and design guidance

Enhanced ESD protection robustness of a lateral NPN structure in the advanced CMOS

High current characteristics of copper interconnect under transmission-line pulse (TLP) stress and ESD zapping

Comparison of ultra-thin gate oxide ESD protection capability of silicided and silicide-blocked MOSFETS

Failure analysis on resistive opens with Scanning SQUID Microscopy

Sidewall damage induced by FIB milling during TEM sample preparation

Gold dendrite simulation and growth kinetics

Gate fault isolation and parametric characterization through the use of Atomic Force Probing

Effect of thermal gradients on the electromigration life-time in power electronics

Effects of low k film properties on electromigration performance

Stress induced degradation of 90nm node interconnects

The influence of surface fluctuations on early failures in single-damascene Cu wires: A Weakest Link Approximation analysis

Electromigration performance enhancement of Cu interconnects with PVD Ta cap

Void and extrusion induced failure of submicron multilevel interconnects

Test structures and DRIE topography for bulk silicon MEMS devices

Thermomechanical behavior and reliability of Au/Si MEMS structures

Multi-level programming of NOR flash EEPROMs by CHISEL mechanism

Flash memory under cosmic & alpha irradiation

Investigation of programmed charge lateral spread in a two-bit storage nitride flash memory cell by using a charge pumping technique

Different approaches for reliability enhancement of p-channel flash memory

Statistical modeling for post-cycling data retention of split-gate flash memories

Development and use of a miniaturized health monitoring device

Standby current prediction model for microprocessors reliability risk assessment

CMOS transistor electrical ageing experiments to build VHDL-AMS behavioral models

Local redesign for reliability of CMOS digital circuits under device degradation

Soft breakdown effects on MOS switch and passive mixer

Thermal runaway avoidance during burn-in

Reliability model and implementation for EEPROM emulation using flash memory

New screen methodology for ultra thin gate oxide technology

The challenge to record correct fast WLR monitoring data from productive wafers and to set reasonable limits

Layout design dependence of NBTI for I/O p-MOSFET

Effect of magnetic field on plasma damage during VIA etching in sub-micron CMOS technology

Thermal degradation of DRAM retention time: Characterization and improving techniques

Threshold energy of neutron-induced single event upset as a critical factor

An alpha immune and ultra low neutron SER high density SRAM

Modeling and verification of single event transients in deep submicron technologies

Technology scaling of critical charges in storage circuits based on cross-coupled inverter-pairs

Neutron-induced SEU in bulk and SOI SRAMS in terrestrial environment

Reliability investigations on a unique direct-tunneling-induced high performance partially-depleted SOI PMOS device

NBTI effects of pMOSFETs with different nitrogen dose implantation

PMOS thin gate oxide recovery upon negative bias temperature stress

Hydrogen-related extrinsic oxide trap generation in thin gate oxide film during negative-bias temperature instability stress

New findings of NBTI in partially depleted SOI transistors with ultra-thin gate dielectrics

Mechanism for reduced NBTI effect under pulsed bias stress conditions

Localized transient charging and it's implication on the hot carrier reliability of HfSiON MOSFETs

Session/Poster paper # to page # cross-reference

2004 IRPS Officers and Committees

Technical Program Committee

Board of Directors

Management Committee/Technical Program Committee

Best Paper Award - A new reliability model for post-cycling charge retention of flash memories

Outstanding Paper Award - Impact of negative bias temperature instability on digital circuit reliability

2004 IRPS Tutorial Program

2003 IEEE International Reliability Physics Symposium Proceedings, 2003. 41st Annual.

2002 IEEE International Reliability Physics Symposium. Proceedings. 40th Annual (Cat. No.02CH37320)

2001 IEEE International Reliability Physics Symposium Proceedings. 39th Annual (Cat. No.00CH37167)

2000 IEEE International Reliability Physics Symposium Proceedings. 38th Annual (Cat. No.00CH37059)

1999 IEEE International Reliability Physics Symposium Proceedings. 37th Annual (Cat. No.99CH36296)

1998 IEEE International Reliability Physics Symposium Proceedings. 36th Annual (Cat. No.98CH36173)

1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual

Proceedings of International Reliability Physics Symposium

Proceedings of 1995 IEEE International Reliability Physics Symposium

Proceedings of 1994 IEEE International Reliability Physics Symposium

31st Annual Proceedings Reliability Physics 1993

30th Annual Proceedings Reliability Physics 1992

29th Annual Proceedings Reliability Physics 1991

28th Annual Proceedings on Reliability Physics Symposium

27th Annual Proceedings., International Reliability Physics Symposium

26th Annual Proceedings Reliability Physics Symposium 1988

25th International Reliability Physics Symposium

24th International Reliability Physics Symposium

23rd International Reliability Physics Symposium

22nd International Reliability Physics Symposium

21st International Reliability Physics Symposium

20th International Reliability Physics Symposium

19th International Reliability Physics Symposium

18th International Reliability Physics Symposium

17th International Reliability Physics Symposium

16th International Reliability Physics Symposium

15th International Reliability Physics Symposium

14th International Reliability Physics Symposium

13th International Reliability Physics Symposium

12th International Reliability Physics Symposium

11th Reliability Physics Symposium

10th Reliability Physics Symposium

9th Reliability Physics Symposium

8th Reliability Physics Symposium

6th Annual Reliability Physics Symposium (IEEE)

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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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