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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Kahng, A.B. Mantik, S. |
| Copyright Year | 2001 |
| Description | Author affiliation: Dept. of Electr. & Comput. Eng., California Univ., San Diego, La Jolla, CA, USA (Kahng, A.B.) |
| Abstract | We present recent extensions to the METRICS infrastructure that allow optimization of design processes at the flow level, rather than only at the individual tool level. As previously reported, METRICS infrastructure allows automatic recording of design and process information. Our extensions include (i) the collection of design flow information for use in flow optimization, and (ii) integration with data mining tools to allow automatic generation of design and flow QOR predictors. Our flow optimization experiments try to optimize incremental multilevel FM partitioner runs in an incremental (ECO-oriented) design flow. We also demonstrate QOR predictors that are generated automatically from the METRICS data warehouse by the Cubist data mining tool for industry placement, clock tree generation, and routing tools. |
| Sponsorship | IEEE Tech. Committee on VLSI Design (TCVLSI) |
| Starting Page | 81 |
| Ending Page | 86 |
| File Size | 686595 |
| Page Count | 6 |
| File Format | |
| ISBN | 0769510256 |
| DOI | 10.1109/ISQED.2001.915210 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2001-03-28 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Process design Design optimization Transmitters Data warehouses XML Computer science Clocks Routing Time to market Electronics industry |
| Content Type | Text |
| Resource Type | Article |
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