NDLI: On limitations of traditional multi-core and potential of many-core processing architectures for sparse linear solvers used in large-scale power system applications

Content Provider	IEEE Xplore Digital Library
Author	Zhao Li Donde, V.D. Tournier, J.-C. Fang Yang
Copyright Year	2011
Description	Author affiliation: ABB US Corp. Research Center, 940 Main Campus Dr. Suite 200, Raleigh NC, 27606, United States (Zhao Li; Donde, V.D.; Tournier, J.-C.; Fang Yang)
Abstract	As the power grid networks become larger and smarter, their operation and control become even more challenging due to the size of the underlying mathematical problems that need to be solved in real-time. In this paper, we report our experience on utilizing the main stream computation architecture to improve performance of solving a system of linear equations, the key part of most power system applications, using iterative methods. Since Conjugate Gradient (CG) algorithms have been applied to power system applications in the literature with a suggested benefit from parallelization, they are selected and evaluated against the mainstream computation architectures (i.e., multi-core CPU and many-core GPU) in the context of both power system state estimation and power flow applications. The evaluation results show that solving a system of linear equations using iterative methods is highly memory bonded and multi-core CPU and GPU computation architecture have different impacts on the performance of such an iterative solver: unlike multicore CPU, GPU can greatly improve the performance of CG-based iterative solver when matrices are well conditioned as typically encountered in the DC power flow formulation.
Starting Page	1
Ending Page	8
File Size	1416920
Page Count	8
File Format	PDF
ISBN	9781457710001
ISSN	19449925
e-ISBN	9781457710025
e-ISBN	9781457710018
DOI	10.1109/PES.2011.6039675
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-07-24
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Jacobian matrices Graphics processing unit Power systems Multicore processing Bandwidth State estimation Open Computing Language (OpenCL) multi-core CPU Graphics Processing Unit (GPU) Conjugate Gradient (CG) Conjugate Gradient Normal Residual (CGNR) power flow power system state estimation High Performance Computing (HPC) Compute Unified Device Architecture (CUDA)
Content Type	Text
Resource Type	Article

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