NDLI: High temperature operation of ISE devices and circuits

Content Provider	IEEE Xplore Digital Library
Author	Vu, D.P. Boden, M.J. Henderson, W.R. Cheong, N.K. Zavracky, P.M. Adams, D.A. Austin, M.M.
Copyright Year	1989
Description	Author affiliation: Kopin Corp., Taunton, MA, USA (Vu, D.P.; Boden, M.J.; Henderson, W.R.; Cheong, N.K.; Zavracky, P.M.)
Abstract	Summary form only given. The high-temperature behavior of devices and circuits fabricated in ISE (isolated silicon epitaxy) SOI wafers and in bulk Si wafers is discussed. The advantages of SOI over bulk circuits under high-temperature operation result from reduced leakage current due to the absence of well junction in CMOS and the reduction of source and drain to body junction areas. One to two orders of magnitude reduction of leakage current for ISE devices compared to equivalent bulk devices is observed at 300 degrees C. At this temperature, junction leakage in bulk devices reaches several tens of microamps. These results indicate the leakage at high temperature is dominated by the diffusion of carriers through junctions (proportional to n/sub i//sup 2/(T)). Another confirmation of this observation is provided by the recovery time of drain-source transient of a depletion-mode MOSFET as a function of temperature when a step bias is applied to the gate.
Starting Page	165
Ending Page	166
File Size	94434
Page Count	2
File Format	PDF
DOI	10.1109/SOI.1989.69815
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1989-10-03
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Temperature Circuits Leakage current Metallization Dielectrics Isolation technology Epitaxial growth Proportional control Process control Content addressable storage
Content Type	Text
Resource Type	Article

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