NDLI: Surface quality of plasma-thinned bonded SOI wafers

Content Provider	IEEE Xplore Digital Library
Author	Feng, T. Matloubian, M. Gardopee, G.J. Mathur, D.P.
Copyright Year	1994
Description	Author affiliation: Hughes Danbury Opt. Syst. Inc., CT, USA (Feng, T.)
Abstract	The continuous decrease in the CMOS device dimension towards the deep submicrometer region has necessitated a concomitant decrease in the thickness of the gate oxide to a few hundred angstroms or less. The quality of such very thin oxides are strongly affected by the surface quality of the silicon substrates-in particular, by the microroughness and metallic surface contamination. To determine the surface quality of the recently developed plasma-thinned bonded SOI wafers, we have carried out a detailed study of the material properties of such plasma etched Si surfaces. Some of these surface properties-for example, surface concentration of metal impurities and crystalline quality of the Si surface-have already been reported, and they indicated that our plasma-thinning process does not cause any surface or subsurface damage to the top Si layer. In this paper, we present additional results on the SOI surface quality with regard to microroughness, gate-oxide breakdown, and SOI/gate oxide interface properties.
Starting Page	77
Ending Page	78
File Size	193809
Page Count	2
File Format	PDF
ISBN	0780324064
DOI	10.1109/SOI.1994.514254
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1994-10-03
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Wafer bonding Surface contamination Plasma applications Plasma properties Plasma materials processing Plasma devices Silicon Material properties Etching Impurities
Content Type	Text
Resource Type	Article

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