NDLI: Robustness and expression independence in 3D face recognition

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Computational complexity of cyclotomic fast Fourier transforms over characteristic-2 fields

Using the arithmetic representation properties of data to reduce the area and power consumption of FFT circuits for wireless OFDM systems

Design and implementation of a high data rate MICS digital baseband transmitter

An information-theoretic framework for joint architectural and circuit level optimization for olfactory recognition processing

Automatic synthesis of TTA processor networks from RVC-CAL dataflow programs

Vectorization and mapping of software defined radio applications on heterogeneous multi-processor platforms

Scheduling of dynamic dataflow programs with model checking

Optimization of portable parallel signal processing applications by design space exploration of dataflow programs

Full-hardware architectures for data-dependent superimposed training channel estimation

A shuffled iterative bit-interleaved coded modulation receiver for the DVB-T2 standard: Design, implementation and FPGA prototyping

EVA-MAC: An event-based adaptive medium access control for wireless sensor networks

Remote diagnostics and performance analysis for a wireless sensor network

Saliency prediction using scene motion for JND based video compression

High speed intra mode and direction prediction for MPEG-2 to H.264/AVC realtime transcoder

Motion blur reduction of liquid crystal displays using perception-aware motion compensated frame rate up-conversion

Hardware architecture design of frame rate up-conversion for high definition videos with global motion estimation and compensation

A hybrid codebook background model for background subtraction

Embedded transition inversion coding for low power serial link

Low energy process variation tolerant digital image processing system design based on accuracy-energy tradeoffs

Determining the minimum energy operating point for embedded SRAM memory

Low-power adder design techniques for noise-tolerant applications

A high parallel macro block level layered LDPC decoding architecture based on dedicated matrix reordering

The power cost of over-designing codes

Improved analytical delay models for coupled interconnects

Energy-efficient XOR gate with embedded level conversion for serial-link encoding

An area-efficient symbol deinterleaver architecture for DVB-T

Reconfigurable cache memory architecture for integral image and integral histogram applications

High level analysis of trade-offs across different partitioning schemes for wireless applications

Efficient multiplierless architecture for frame synchronization in DVB-S2 standard

Hardware efficiency versus error probability in unreliable computation

Methodology for the hardware/software co-design of dataflow programs

Stochastic modeling for floating-point to fixed-point conversion

Methodology and technique to improve throughput of FPGA-based Cal dataflow programs: Case study of the RVC MPEG-4 SP Intra decoder

Beamforming for interference mitigation and its implementation on an SDR baseband processor

Efficient multicore scheduling of dataflow process networks

Generalized interleaving network based on configurable QPP architecture for parallel turbo decoder

Reduced complexity Chase-Pyndiah decoding algorithm for turbo product codes

Combining LDPC, turbo and Viterbi decoders: Benefits and costs

VLSI architecture for soft-output tuple search sphere decoding

Parallel SFSD MIMO detection with SOFT-HARD combination enumeration

Algebraic hybrid satellite-terrestrial space-time codes for digital broadcasting in SFN

An energy-efficient multiple-input multiple-output (MIMO) detector architecture

Improved crosstalk avoidance codes based on a novel pattern classification

New hardware Cryptosystem based chaos for the secure real-time of embedded applications

Flexible product code-based ECC schemes for MLC NAND Flash memories

Coding method for embedding audio in video stream

Classification of multichannel uterine EMG signals by using unsupervised competitive learning

Hybrid lossless compression of breast mammography

Frequency domain: Efficient and high speed technology for video transmission

Fast modified Horn & Schunck method for the estimation of optical flow fields

Robustness and expression independence in 3D face recognition

Disparity map estimation under convex constraints using proximal algorithms

Digit recognition with confidence

Enabling efficient system configurations for dynamic wireless baseband engines using system scenarios

Highly scalable implementation of a robust MMSE channel estimator for OFDM multi-standard environment

An efficient Gaussian random number architecture for MIMO channel emulators

Fast computation of Gaussian likelihoods using low-rank matrix approximations

An encoding scheme and encoder architecture for rate-compatible QC-LDPC codes

A robust RAM-THP architecture for downlink multiuser MISO transmission with user scheduling

Compressed sensing based MR image reconstruction from multiple partial K-space scans

PCA and KPCA of ECG signals with binary SVM classification

Effect analysis of age and gender on postural stability using PCA decomposition

A hardware architecture for accelerating neuromorphic vision algorithms

Adaptive thresholding incorporating temporal and spatial information with eigen-based clutter filter for color Doppler processing in ultrasonic systems

Real-time closed-loop tracking of an unknown number of neural sources using probability hypothesis density particle filtering

A neural networks approach to interval-valued data clustering. Applicationto Lebanese meteorological stations data

A comparative study of pre-image techniques: The kernel autoregressive case

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1997 IEEE Workshop on Signal Processing Systems. SiPS 97 Design and Implementation formerly VLSI Signal Processing

Robustness and expression independence in 3D face recognition

Content Provider	IEEE Xplore Digital Library
Author	Shun Miao Krim, H.
Copyright Year	2011
Description	Author affiliation: North Carolina State University, ECE Department, Raleigh, NC-27606, USA (Shun Miao; Krim, H.)
Abstract	We describe a robust method for 3D face recognition under variance of facial expressions. The method utilizes the identical areas on two facial images as the measurement of distance. To segment the identical area, partial shape matching is performed using closest point registration and level set method. The segmentation problem is formalized into an Eikonal equation, which can be efficiently solved by fast marching method. The presented 3D face recognition method shows a very promising recognition rate.
Starting Page	289
Ending Page	292
File Size	283377
Page Count	4
File Format	PDF
ISBN	9781457719202
ISSN	21623562
e-ISBN	9781457719219
DOI	10.1109/SiPS.2011.6088991
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-10-04
Publisher Place	Lebanon
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Three dimensional displays Face Face recognition Level set Equations Nose Iterative closest point algorithm Iterative Closest Point (ICP) Face Recognition Level Set Method Fast Maching Algorithm
Content Type	Text
Resource Type	Article

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