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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Jinsong Zhu Pratt, A. |
| Copyright Year | 2008 |
| Description | Author affiliation: Intel Asia-Pacific R&D Ltd. Shanghai, Shanghai (Jinsong Zhu) |
| Abstract | In order to achieve high power density in power supplies, it is desirable to minimize the physical size of the energy storage capacitor. The capacitance is determined by the energy storage requirement for line outage ride-through and also the ripple current handling capability of the capacitor. In cases where ripple current considerations dominate, interleaving is well known as an effective method to reduce the capacitor ripple current. This paper presents a methodology to calculate the ripple current, both for single phase and for m interleaved phases of power factor correction (PFC) converters operating with constant load or a DC-DC converter load. Experimental results from a commercial power supply yielded a small error when compared to the calculations, showing that the proposed methodology has enough accuracy to be used as a design tool. |
| Starting Page | 3444 |
| Ending Page | 3450 |
| File Size | 199162 |
| Page Count | 7 |
| File Format | |
| ISBN | 9781424416677 |
| ISSN | 02759306 |
| DOI | 10.1109/PESC.2008.4592488 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2008-06-15 |
| Publisher Place | Greece |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Converters Capacitors Integrated circuits Inductance Switches Energy storage Harmonic analysis |
| Content Type | Text |
| Resource Type | Article |
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