NDLI: A real-time 3D IR camera based on hierarchical orthogonal coding

Content Provider	IEEE Xplore Digital Library
Author	Sukhan Lee Jongmoo Choi Seungsub Oh Jaehyuk Ryu Jungrae Park
Copyright Year	2006
Description	Author affiliation: Intelligent Syst. Res. Center, Sung Kyun Kwan Univ., Suwon (Sukhan Lee; Jongmoo Choi; Seungsub Oh; Jaehyuk Ryu; Jungrae Park)
Abstract	We present a real-time 3D camera based on IR (infrared) structured light suitable for robots working in home environment. First, we implemented a HOC (hierarchical orthogonal coding) based FPGA board. The HOC gives robust depth images because the signal separation coding provides not only the separation of overlapped codes, but also a robust decision on pixel correspondence with error correction. The FPGA module can handle high computational cost of HOC based signal separation coding. Second, we implemented a compact optic system of the camera to project and receive IR structured light. The invisible IR pattern light provides users inconvenient in the home environment. Various objects and workspaces which has continuous and/or non-continuous surface are tested and, sensitivity to illumination change and processing time are analyzed. The experiment results show the robust performance for surface smoothness, color, and materials of objects used in home environment. The proposed approach opens a greater feasibility of applying structured light based depth imaging to a 3D modeling of cluttered workspace for home service robots
Sponsorship	IEEE Robotics and Autom. Soc
Starting Page	2035
Ending Page	2040
File Size	1063900
Page Count	6
File Format	PDF
ISBN	0780395050
ISSN	10504729
DOI	10.1109/ROBOT.2006.1642004
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-05-15
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Cameras Robustness Robot vision systems Field programmable gate arrays Source separation Image coding Pixel Error correction codes Computational efficiency Optical sensors
Content Type	Text
Resource Type	Article
Subject	Artificial Intelligence Control and Systems Engineering Electrical and Electronic Engineering Software

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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