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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Aymerich, N. Cotofana, S. Rubio, A. |
| Copyright Year | 2011 |
| Description | Author affiliation: Department of Electronic Engineering, UPC Barcelona Tech, Jordi Girona 1-3, C4-213, 08034, Spain (Aymerich, N.; Rubio, A.) || Electrical Engineering Department, Delft University of Technology, Mekelweg 4, 2628 CD, The Netherlands (Cotofana, S.) |
| Abstract | This paper introduces an efficient adaptive redundant architecture, which makes use of the averaging cell (AVG) principle in order to improve the reliability of nanoscale circuits and systems. We define an adaptive averaging cell structure (AD-AVG) that is able to cope with non-homogeneous variability and time-varying effects like degradation and external aggressions, which are expected to be a key limiting factor in future technologies. In order to achieve this goal the AD-AVG relies on the modification of the input weights so that reliable inputs have greater influence on the result than the less reliable ones. In this paper we find analytically the weight distribution that minimizes the error probability at the cell output in terms of the input variability levels. Monte Carlo based simulation results indicate that our proposal outperforms the traditional AVG at the expense of less area overhead. For the same reliability target the AD-AVG scheme requires about 70% less redundancy, when compared with the traditional balanced AVG approach. |
| Starting Page | 1441 |
| Ending Page | 1444 |
| File Size | 186369 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781457715143 |
| ISSN | 19449399 |
| e-ISBN | 9781457715167 |
| e-ISBN | 9781457715150 |
| DOI | 10.1109/NANO.2011.6144528 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2011-08-15 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Error probability Computer architecture Redundancy Mathematical model Equations Microprocessors |
| Content Type | Text |
| Resource Type | Article |
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