NDLI: Fast feature based non-destructive fault isolation in 3D IC packages utilizing virtual known good device

Content Provider	IEEE Xplore Digital Library
Author	Lee, K.C. Alton, J. Igarashi, M. Barbeau, S.
Copyright Year	2015
Description	Author affiliation: TeraView Ltd., Cambridge, UK (Lee, K.C.; Alton, J.; Igarashi, M.) \|\| IBM Syst., Bromont, QC, Canada (Barbeau, S.)
Abstract	We combine Electro Optical Terahertz Pulse Reflectometry (EOTPR), with full three dimensional device-under-test (DUT) modeling utilizing virtual known good device to quickly and non-destructively isolate faults in advanced 3D IC packages. Computation power required for modeling can quickly become prohibitive with the design complexities of modern IC packages. In this study we adopt a piecemeal modeling approach that bypasses this exponential requirement. A PFA study verifies the accuracy of our model. This shows that feature-based fault analysis with a distance-to-defect accuracy of less than 10 μm can be readily attained through the combination of these techniques.
Starting Page	64
Ending Page	67
File Size	288004
Page Count	4
File Format	PDF
ISBN	9781479999286
DOI	10.1109/IPFA.2015.7224334
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-06-29
Publisher Place	Taiwan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Circuit faults Substrates Three-dimensional displays Integrated circuit modeling Reflectometry Solid modeling
Content Type	Text
Resource Type	Article

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Fast feature based non-destructive fault isolation in 3D IC packages utilizing virtual known good device