NDLI: Improved fault localization method for power devices

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2015 IEEE 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits

Reliability and technology scaling beyond the 10nm node

3D-IC FPGA: KGD, DFT and build-in FA capabilities

Study of thermal cycling and temperature aging on PbSnAg die attach solder joints for high power modules

Laser-Assisted Device Alteration (LADA) for fault isolation and quick design fix in marginality failure

Timing analysis case studies using 1064 nm Continuous Wave laser for Fault Isolation on scan failures

Combining design simulations with nano-probing to root-cause a processor device glitch issue

A technique to investigate the root cause of Write Recovery Time (tWR) failure

From VLSI to WLSI an introduction to 3D wafer level system integration

The demonstrations and discussion for static/read/write noise margin (SNM/RNM/WNM) via Nanoprobing to SRAM FA applications

Low-κ and High-κ breakdown statistics with variability: Clustering model versus reconstruction methodology (Invited)

Quality and reliability investigation of Ni/Sn transient liquid phase bonding technology

A Study of unique galvanic failure due to interaction with well structure

Characteristic improvement of inkjet printed Ag interconnects using tape on-off and mirror-reaction processes

Effect of pre-CMP annealing on TSV pumping in thermal budget and reliability test

Cu via process optimization by electro-migration estimation testing

Cutting-edge technologies for failure analysis and their applications in industry

Application of FIB-SEM and Raman spectroscopy for investigating conductive carbon particles in epoxy encapsulation of IC

Feasibility study of TOF-SIMS surface measurement for Aluminum bond pad fluorine contamination

Fast feature based non-destructive fault isolation in 3D IC packages utilizing virtual known good device

Effects of interface properties in SiC MOSFETs on reliability

Effect of series resistance on dielectric breakdown phenomenon of silicon carbide MOS capacitor

A unified model to understand degradation of a-InGaZnO TFTs under various gate bias stresses with or without light illumination

A unified drain current model for poly-Si and a-InGaZnO TFTs under different temperatures

Stability of High performance p-type SnO TFTs

Study on the impact of barrier metal deposition processes on W Via/CA ET high resistance by TEM failure analysis

Cu wire bonding process induced fail mechanism — Inter Layer Dielectric Crack

Comparative study of different technology of mechanical decap to check excess solder issue — Conventional versus new approaches

Evaluation of copper nanoparticles for low temperature bonded interconnections

On the origin of frequency dependence of single-trap induced degradation in AC NBTI

UTB GeOI 6T SRAM cell and sense amplifier considering BTI reliability

SRAM V yield challenge in 40nm embedded NVM process

Understanding NBTI-induced dynamic variability in the nano-reliability Era: From devices to circuits

Micro analysis regarding package interconnection

FIB tilting method for thin TEM lamella preparation

Study of dry delineation with Argon sputtering on FIB-milled copper profile

Electrical model of a PMOS body biased structure in triple-well technology under pulsed photoelectric laser stimulation

Debugging MBIST hard fails without bitmapping

High Resistance Open localization

Understanding defect kinetics in ultra-thin dielectric logic and memory devices using random telegraph noise analysis

The RTN measurement technique on leakage path finding in advanced high-k metal gate CMOS devices

Localized Random Telegraphic Noise Study in HfO dielectric stacks using Scanning Tunneling Microscopy — Analysis of process and stress-induced traps

Image improvement using image processing for scanning acoustic tomograph images

Study and implementation conditions of the multivariate outlier detection methods for screening of potential field failures

Evaporation method to eliminate Si-Matrix interferences for thick oxide wafers VPD-ICPMS analysis

SIMS characterization of isotope antimony implant for buried implant

Determination of iodide in clean room air by ion chromatography

Sample preparation DOE for the die pull test

Enhanced passivation integrity test for improved passivation failure detection

An efficient method of exposing on-chip polyfuses using dry chemical Plasma etching technique

Highly accurate TEM/EDS analysis to identify the stack oxide-nitride-oxide structure of advanced NAND flash products

Quantitative analysis of the accuracy and sensitivity of strain measurements from nanobeam electron diffraction

Junction/well stain (delineation) technique to unveil different types of implantation defects

Application of atomic force probing on the polysilicon patterning issue

Electrical simulation on the localized NVM failed cell by AFP nanoproing

Improved fault localization method for power devices

Optimization and application of Electron Beam Absorbed Current technique

The investigation of Active VC and EBAC analysis utilization on test structure

Debug of implant angle deviation based on SIMS analysis

The factors study of backside hotspot localization with application Infrared Lock-in Thermography

Contaminant failure analysis: A particle library and its search engine

SDL(Soft Defect Location) technical in analysing the laser beam wavelength and temperature sensitive failures in VLSI failure analysis

Correlating SEM and SPM for nanoprobing in failure analysis

Study of de-golding technology for MIM capacitor failure analysis in GaAs integrated circuit

Current imaging technique with nanometer resolution for failure analysis of metal layers

Vertical SCR structure for on-chip ESD protection in nanoscale CMOS technology

Die front-end defect isolation case study using a combination of atomic force probing and transmission electron microscopy techniques

Wafer level circuit analysis & micro-probing on open failure of voltage regulator device

Study on the poly bump defect by TEM failure analysis

TEM and chemical preferential etching analysis of protected FET leakage failure

Title: In-depth analysis to identify process related defects causing Electrical Overstress on Clip bonded Schottky power rectifiers: A case study

Low voltage In-lens secondary electron imaging in device failure analysis

Open via with capacitive behaviour defect in scan logic failure analysis

Reliability analysis of amorphous silicon thin-film transistors during accelerated ESD stress

Static fault localization on Memory failures using Photon Emission Microscopy

A novel approach to deprocess highly sensitive multi-layered IC device using polyimide protective films without damaging active circuitry

Galvanic corrosion mechanism and suppressed solution on Al/Cu pads

Failure localization on a Low-Dropout Voltage Regulator with Reset Automotive Device due to wire bonding issue

A new localized ink coating methodology for preventing photoresist deformation for TEM sample preparation

Leakage current study and relevant fault localization by IR-OBIRCH

OBIRCH analysis of electrostatic discharge ICs

Double snapback phenomena in transient power-rail ESD clamp circuits for latch-up free concerns

Application of voltage and waveform forcing method for electrical isolation of complex and loop circuit in failure analysis

Study on salicide partial missing induce advanced SRAM device soft failure

2.5D/3D device package level defect localization with the use of multiple curve tracings and repeated thermal emission analyses

A comparison study on the Al-based interfacial layers for Ge MIS devices

Impact of fluorine on Idsat of field-effect transistor

Gate oxide reliability improvement for UMOS technology

An investigation on the high temperature dependence of the HCI on NMOSFET transistor

Oxygen pressure induced the electrical properties of amorphous LaAlO dielectric deposited by pulsed laser deposition at room temperature

An abnormal threshold voltage variation of the p-type thin-film transistors under DC bias stress

HV PMOSFET V shift suppression after HTOL by modified p-Hump prevention ion implant

Bump resistance change behavior due to Cu-Sn IMCs formation with various solder diameters

A study of the Au-Al bonding lifetime for MOSFET devices

Stability of InGaZnO thin-film transistors with Durimide passivation

Study on transparent amorphous indium oxide thin film transistors technology

Fabrication of a novel device by release the stress in a reliable way

Reduction of gate-induced drain leakage current of polycrystalline silicon thin-film transistor by drain bias sweeping

Reliability investigation of flexible graphene-based actuator

InGaAs metal-oxide-semiconductor FETs with self-aligned Ni-Alloy source/drain

An Au-free GaN high electron mobility transistor with Ti/Al/W Ohmic metal structure

Failure mechanism of VCSELs in optical mouse applications at non-hermitic conditions

A high tensile stress spacer by low temperature microwave anneal induced 50% mobility enhancement for nano scale FinFETs device

Study of junction temperature effect on electrical power of light-emitting diode (LED) devices

Factors affecting hysteresis in the transfer curves of a-IGZO TFTs under illumination and raised temperature

Improved reliability of GaN HEMTs using N2 plasma surface treatment

Performance and reliability of non-linear Al-Zn-Sn-O based resistive random access memory

Simulations of electric field distributions by the susceptor-coupling effects for 2.45GHz microwave inside microwave chamber

Sequentially stacked 3DIC technology using green nanosecond laser crystallization and laser spike annealing technologies

Fast and reliable charge-trap non-volatile memories using low thermal budget processes in monolithic 3DIC application

Fault isolation and TEM study in the state-of-art Thin-Film Transistor

Analysis of electromigration void nucleation failure time in open copper TSVs

Fabrication and reliability investigation of copper pillar and tapered through silicon via (TSV) for direct bonding in 3D integration

Cu concentration from backside contamination induced STI crack after High Temperature Stress

Effects of the initial stress at the bottom of open TSVs

Impact of aspect ratio and line spacing on microstructure in damascene Cu interconnects

Comparative study on sample preparation techniques for Cu-Al interfacial analysis

A sample preparation methodology to reduce sample edge unevenness and improve efficiency in delayering the 20-nm node IC chips

Decapsulation of 3D multi-die stacked package

Four-Point Bending Methodology development for 40nm technology Cu/Nblk interface adhesion measurement

New insights on the origin of Resistive switching in HfO thin films: The role of local mechanical strength

Grain size effect of monolayer MoS2 transistors characterized by second harmonic generation mapping

Temperature effects on current-voltage and low frequency noise characteristics of multilayer WSe FETs

Study of reliability physics on high-k/metal gate and power devices

Micromechanical robustness tests of 28nm BEOL layer stacks

Acid decapsulation for silver wire bonded package

New method for chemical characterization of polymer materials in industrial devices : AFM-IR with FIB sample preparation

Diamond milling with an Atomic Force Microscope

A study of fin width effect on the performance of FinFET

An Investigation of DC/AC hot carrier degradation in multiple-fin SOI FinFETs

Characterization and analysis of tiny in-line defect in 28nm process

Understanding of HCI degradation temperature dependence in SOI STI-pLDMOSFETs from MR-DCIV spectroscopy

Novel interposer scheme for 3D integration

Improved CT reconstruction resolution using Differential Cone-Beam CT reconstruction

The FA approaching and designed solution to the hidden PID killer

Improve latch-up immunity by circuit solution

Application study of simply and low cost numerical aperture increasing lens (NAIL) system for OBIRCH and EMMI in backside failure analysis

Reliability simulation of TMO RRAM

Justification and Monte Carlo simulation of microstructure evolution process of conductive filament in reset transition in Cu/HfO/Pt RRAM

Methodology for stability evaluation on the Multi-level storages of oxide-based conductive bridge RAM (CBRAM)

Analysis of current compliance on resistive switching of silver programmable metallization cells with stacked SiO solid electrolytes

Improving the resistive switching reliability via controlling the resistance states of RRAM

Magnetic Current Imaging using multi path analysis for power short localization

An initiative to develop a new approach for fracture characterization of silicon die crack

Copper dendrite formation on laser fuse structures of flip chip die

Active Electrostatic Force Microscopy

Fault isolation using Electrically-enhanced LADA (EeLADA)

The Origin of so-called ghost modulated reflectance mapping and its application in FA

Proceedings of the 21th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)

Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)

2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits

18th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)

2010 17th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits

2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits

2008 15th International Symposium on the Physical and Failure Analysis of Integrated Circuits

2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits

2006 13th International Symposium on the Physical and Failure Analysis of Integrated Circuits

Proceedings of the 12th International Symposium on the Physical and Failure Analysis of Integrated Circuits, 2005. IPFA 2005.

Proceedings of the 11th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2004 (IEEE Cat. No.04TH8743)

Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003

Proceedings of the 9th International Symposium on the Physical and Failure Analysis of Integrated Circuits (Cat. No.02TH8614)

Proceedings of the 2001 8th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2001 (Cat. No.01TH8548)

Proceedings of the 1999 7th International Symposium on the Physical and Failure Analysis of Integrated Circuits (Cat. No.99TH8394)

Proceedings of the 1997 6th International Symposium on the Physical and Failure Analysis of Integrated Circuits

Proceedings of 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits

Improved fault localization method for power devices

Content Provider	IEEE Xplore Digital Library
Author	Huaping Lai Liao, S. Wei Xu
Copyright Year	2015
Description	Author affiliation: Quality & Reliability Assurance Div., Shanghai Huahong Grace Semicond. Manuf. Corp., Shanghai, China (Huaping Lai; Liao, S.; Wei Xu)
Abstract	Fault localization for power device is difficult due to their special structure with a thick metal layer on the surface as the testing terminal. This layer enhances the thermal diffusion and blocks the photon emission, which restricts the function of LC analysis, PEM or OBIRCH. The experiment shows that using the thinning layer like the barrier layer as the terminal after removing the most of the thick metal, the device remains the same status, while the PEM and OBIRCH work with high efficiency and defect could be located with much higher accuracy. The method is successfully applied for FA of conventional Power MOS, Super Junction, Diode and IGBT devices.
Starting Page	246
Ending Page	249
File Size	1466216
Page Count	4
File Format	PDF
ISBN	9781479999286
DOI	10.1109/IPFA.2015.7224370
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-06-29
Publisher Place	Taiwan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Aluminum Tin Testing Photonics Accuracy Junctions
Content Type	Text
Resource Type	Article

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