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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Macariu, G. Frincu, M. Carstea, A. Petcu, D. Eckstein, A. |
| Copyright Year | 2007 |
| Description | Author affiliation: Inst. e-Austria Timisoara, Timisoara (Macariu, G.; Frincu, M.; Carstea, A.) |
| Abstract | The ability of multi-core processors to increase application performance depends on the use of multiple threads within applications. Symbolic computations, requiring both CPU power and large memory, are well-suited candidates for deriving advantages from multi-core parallel architectures. This is possible only if the specific libraries and tools are designed to allow multi-threading and multi-processes. In order to promote the changes needed to adapt these libraries and tools to the new architectures, the changes performed on two main algorithms for symbolic computations, parallel integer factorization and parallel Grobner base computation, are described and discussed. |
| Starting Page | 417 |
| Ending Page | 417 |
| File Size | 221545 |
| Page Count | 1 |
| File Format | |
| ISBN | 9780769529448 |
| ISSN | 1089795X |
| DOI | 10.1109/PACT.2007.4336245 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-09-15 |
| Publisher Place | Romania |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Concurrent computing Packaging Yarn Polynomials Libraries Computer architecture Arithmetic Message passing Testing Parallel architectures |
| Content Type | Text |
| Resource Type | Article |
| Subject | Theoretical Computer Science Hardware and Architecture Software |
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