NDLI: Different Proposals to Matrix Multiplication Based on FPGAS

Content Provider	IEEE Xplore Digital Library
Author	Bravo, I. Jimenez, P. Mazo, M. Lazaro, J.L. de las Heras, J.J. Gardel, A.
Copyright Year	2007
Description	Author affiliation: Univ. of Alcala, Alcala de Henares (Bravo, I.; Jimenez, P.; Mazo, M.; Lazaro, J.L.; de las Heras, J.J.; Gardel, A.)
Abstract	Matrix multiplication is a typical operation in different engineering areas, such as signal or image processing. This paper makes a brief description about some matrix multiplication proposals when working in FPGAs (field programmable gate array). Thanks to their low prices and low costs, currently these devices are used in many and different applications. There are some alternative methods that optimize execution time to carry out this operation under FPGAs. The internal structure of these devices allows parallel execution of matrix multiplication. However, a systolic structure needs many internal resources such as embedded multipliers and often it cannot be used because of the low number of embedded multipliers in the used device. This structure is commonly used in FPGAs for small size matrices. However our proposed alternatives allow an efficient multiplication of matrices of sizes as big as 512 times 512 elements. The study done in this work compares the delay and area consumed of different matrix multiplication algorithms.
Starting Page	1709
Ending Page	1714
File Size	2213433
Page Count	6
File Format	PDF
ISBN	9781424407545
DOI	10.1109/ISIE.2007.4374862
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-06-04
Publisher Place	Spain
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Proposals Field programmable gate arrays Partitioning algorithms Image processing Signal processing Costs Optimization methods Delay Availability Hardware
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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