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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Muyulema, S. Bueno, E.J. Rodriguez, F.J. Cobreces, S. Diaz, D. |
| Copyright Year | 2007 |
| Description | Author affiliation: Alcala Univ., Alcala de Henares (Muyulema, S.; Bueno, E.J.; Rodriguez, F.J.; Cobreces, S.; Diaz, D.) |
| Abstract | This document presents interesting results in a grid converter synchronization based on the p.u. magnitudes in the positive reference frames. This methods introduces small modifications respect to the sPLL (software phase locked loop) presented by the authors in previous works. The main idea is to compare the two sPLL systems: in the first one, the error signal is $V_{dp}$ (positive refence frame); whereas in the second one, the error signal is $V_{dp}$ divided by its magnitude. For this reason, the method receives the name: "p.u. magnitude". The desired objective is to reflect correctly the abrupt phase changes in the control synchronization system of the grid converters, which will be more important under hard unbalance dips and phase-angle jumps in the grid system. On other hand, in the introduction of this paper, the new "generalized functions block" for the synchronization systems are suggested that are used to represent the models in great part of the different works about this topic. This generalization includes two blocks which are denominated: SIB (signal interface block) and CB (calculator block). |
| Starting Page | 186 |
| Ending Page | 191 |
| File Size | 6241950 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781424407545 |
| DOI | 10.1109/ISIE.2007.4374596 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-06-04 |
| Publisher Place | Spain |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Phase locked loops Control systems Filters Power system modeling |
| Content Type | Text |
| Resource Type | Article |
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