NDLI: An Analysis of SEU Effects in Embedded Operating Systems for Real-Time Applications

Content Provider	IEEE Xplore Digital Library
Author	Sterpone, L. Violante, M.
Copyright Year	2007
Description	Author affiliation: Politecnico di Torino, Torino (Sterpone, L.; Violante, M.)
Abstract	Embedded operating systems are becoming widely used in electronic systems for fields ranging from the mobile phone to the industrial control mechanisms. The major advantages in using embedded operating systems include the capability of adapting the electronic functionalities to several kind of applications while respecting the real-time constraints. These characteristics make them attractive also for specific fields where the dependability is a major concern, such as automotive, avionic or space missions. When the dependability is considered embedded operating systems must guarantee their functionality under the presence of Single Event Upsets (SEUs) that may alter their modules. In this paper we proposed a novel methodology for the analysis and the classification of SEU's induced effects that may corrupt the functionality of an embedded operating system while executing a real-time application. The developed method is based on a fault injection engine that is able to inject and classify SEU within the internal registers and memory cells of an embedded operating systems running on a FPGA device. As case study we evaluated the muC-Linux operating system running on a Xilinx-based microprocessor core supported by a Virtex-II Pro SRAM-based FPGA. Experimental results are presented and commented.
Starting Page	3345
Ending Page	3349
File Size	918937
Page Count	5
File Format	PDF
ISBN	9781424407545
DOI	10.1109/ISIE.2007.4375152
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-06-04
Publisher Place	Spain
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Operating systems Real time systems Single event upset Field programmable gate arrays Mobile handsets Industrial control Automotive engineering Aerospace electronics Space missions Engines
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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