NDLI: Crosstalk-aware channel transmitting scheme for error resilience NoC interconnects

Content Provider	IEEE Xplore Digital Library
Author	Bin Wang Jing Xie Qin Wang
Copyright Year	2011
Description	Author affiliation: School of Microelectronics, Shanghai Jiao Tong University, Shanghai, 200240, P.R. China (Bin Wang; Jing Xie; Qin Wang)
Abstract	Network-on-chip (NoC) is continuously capturing the interests from academic and industrial communities. Signal integrity is one of the critical challenges in designing NoC, especially the eager demand from the chips which are in hard environment full filled with energetic particles. In this paper, we propose a set of reliable switch-to-switch error control scheme for NoC interconnects. By employing multiple-continuous-error-correct-coding (MCECC), the maximum word fault tolerance can be 14 bits. And the combined error control scheme enhances the robust communication. Experiments show that the proposed design can reduce nearly 50% wire coupling capacitance energy dissipation and 50% word error probability.
Starting Page	190
Ending Page	193
File Size	427729
Page Count	4
File Format	PDF
ISBN	9781457703201
e-ISBN	9781457703218
DOI	10.1109/ICECC.2011.6067826
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-09-09
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Crosstalk avoidance Error control scheme Error probability Multiple continuous error correction Network on chip(NoC) Crosstalk Capacitance Encoding Error correction Error correction codes Reliability
Content Type	Text
Resource Type	Article

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