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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Bhakthavatchalu, R. Karthika, V.S. Ramesh, L. Aamani, B. |
| Copyright Year | 2013 |
| Description | Author affiliation: Dept. of Electron. & Commun. Eng., Amrita Vishwa Vidyapeetham, Kollam, India (Bhakthavatchalu, R.; Karthika, V.S.; Ramesh, L.; Aamani, B.) |
| Abstract | Cascaded Integrator Comb (CIC) filters are extensively used in Multirate signal processing as a filter for both decimation and interpolation processes. This paper analyzes optimized architecture and implementation aspects of decimator and interpolator using CIC filter and comparison between the results in hardware and simulations. The hardware is synthesized in FPGA and verified with Modelsim and Matlab simulation results. CIC filters function as efficient anti-aliasing filters before downsampling of signals in decimation process and as anti-imaging filters after upsampling of signals in interpolation process. This paper also discusses about pipelining, throughput and area reduction techniques and performance analysis with respect to the number of stages (N) and rate change factor (R) of the filter. |
| Sponsorship | IEEE Kerala Sect. |
| Starting Page | 812 |
| Ending Page | 817 |
| File Size | 324941 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781467350891 |
| e-ISBN | 9781467350907 |
| DOI | 10.1109/iMac4s.2013.6526518 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2013-03-22 |
| Publisher Place | India |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | FPGA Transfer functions Table lookup Interpolation Finite impulse response filters Multirate Filtering theory Interpolator Modelsim Delays CIC Filter Decimator Field programmable gate arrays |
| Content Type | Text |
| Resource Type | Article |
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