NDLI: Ground rule slack aware tolerance-driven optical proximity correction for local metal interconnects

Content Provider	IEEE Xplore Digital Library
Author	Banerjee, Shayak Agarwal, Kanak Orshansky, Michael
Copyright Year	2010
Description	Author affiliation: IBM Research, USA (Agarwal, Kanak) \|\| University of Texas - Austin, USA (Banerjee, Shayak; Orshansky, Michael)
Abstract	The current method of communicating process capabilities to the designer is in the form of ground rules. However, due to constraints on the complexity and number of rules, there may exist shapes that are design-rule clean but difficult to manufacture. This problem is exacerbated in local routes drawn on 1x metal (M1) which allows highly bi-directional shapes at tight spacing. On the other hand, local M1 routes have low parasitic resistance and capacitance as compared to device impedances. Hence there exists an opportunity to perturb these shapes to improve their manufacturability without significant performance impact. We propose to guide this perturbation by the amount of leeway available between the designed values and the ground rules - which we refer to as ground rule slack. In this paper, we utilize ground rule slack to generate tolerance bands for layout features. We further develop a tolerance-driven optical proximity correction (TD-OPC) algorithm which utilizes such tolerance bands to find a lithographically optimal mask solution for manufacturing. Our experiments on sample layouts shows that the use of this methodology helps reduce lithographic hotspots by 59% in comparison to process window optical proximity correction.
Starting Page	1
Ending Page	4
File Size	257604
Page Count	4
File Format	PDF
ISBN	9781424457588
ISSN	21523630
e-ISBN	9781424457601
DOI	10.1109/CICC.2010.5617379
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-09-19
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Layout Shape Metals Adaptive optics Lithography Algorithm design and analysis
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Design driven patterning optimizations for low K lithography

Lithography-aware layout compaction

Physical design and mask optimization for directed self-assembly lithography (DSAL)

A methodology for propagating design tolerances to shape tolerances for use in manufacturing

Layout design methodolgies for sub-wavelength manufacturing

Layout design and lithography technology for advanced devices 116 layout design and lithography technology for advanced devices.

The selection and creation of the rules in rules-based optical proximity correction

Design-aware lithography

Detailed routing for Spacer-Is-Metal type Self-Aligned Double/Quadruple Patterning Lithography

Ground rule slack aware tolerance-driven optical proximity correction for local metal interconnects

Similar Documents

Design driven patterning optimizations for low K lithography

Lithography-aware layout compaction

Physical design and mask optimization for directed self-assembly lithography (DSAL)

A methodology for propagating design tolerances to shape tolerances for use in manufacturing

Layout design methodolgies for sub-wavelength manufacturing

Layout design and lithography technology for advanced devices 116 layout design and lithography technology for advanced devices.

The selection and creation of the rules in rules-based optical proximity correction

Design-aware lithography

Detailed routing for Spacer-Is-Metal type Self-Aligned Double/Quadruple Patterning Lithography

Ground rule slack aware tolerance-driven optical proximity correction for local metal interconnects