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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Tzu-Min Ou Borsa, T. Van Zeghbroeck, B. |
| Copyright Year | 2015 |
| Description | Author affiliation: Dept. of Electr., Comput., & Energy Eng., Univ. of Colorado - Boulder, Boulder, CO, USA (Tzu-Min Ou; Borsa, T.; Van Zeghbroeck, B.) |
| Abstract | Summary form only given. Graphene is known for its high carrier mobility and high saturation velocity . The majority of graphene transistors in the literature-including MOSFETs, barristors, and tunneling FETs-have a gate separated from the channel by a conventional or high-K dielectric layer. In this paper we demonstrate for the first time a lateral graphene FET gated by a graphene/semiconductor heterojunction. The device consists of a p-type graphene channel and an n-type semiconductor gate. Since no metal/dielectric-stacked gate is used, the device is referred to as graphene junction FET (G-JFET). Such a device is of interest as an alternate to G-MOSFETs, or as a back gate for G-MOSFETs with the feature that the device's Dirac voltage $(V_{Dirac})$ can be tuned by the doping density of semiconductor gate. This G-JFET device demonstrates for the first time the feasibility of using a graphene/n-semiconductor Schottky junction as the gate mechanism to control the conductivity of a graphene channel. The Schottky-junction back gate of a G-JFET also provides an additional degree of freedom to tune the $V_{Dirac}$ of each individual transistor by doping specific regions underneath the graphene channel. |
| Sponsorship | IEEE Electron Devices Soc. |
| Starting Page | 139 |
| Ending Page | 140 |
| File Size | 1527600 |
| Page Count | 2 |
| File Format | |
| ISBN | 9781467381345 |
| e-ISBN | 9781467381352 |
| DOI | 10.1109/DRC.2015.7175594 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2015-06-21 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Logic gates Doping Gold Dielectrics Graphene Transistors High K dielectric materials |
| Content Type | Text |
| Resource Type | Article |
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