NDLI: 3D Si-based nanochannel platform for robust cell electroporation

Content Provider	IEEE Xplore Digital Library
Author	Bertani, P. Chang, L.Q. Gallego-Perez, D. Malkoc, V. Lee, L.J. Lu, W.
Copyright Year	2015
Description	Author affiliation: NSEC Center For Affordable Nanoengineering of Polymeric Biomed. Devices, Ohio State Univ., Columbus, OH, USA (Chang, L.Q.; Gallego-Perez, D.; Malkoc, V.; Lee, L.J.) \|\| Dept. of Electr. & Comput. Eng., Ohio State Univ., Columbus, OH, USA (Bertani, P.; Lu, W.)
Abstract	Electroporation is a cellular delivery method making use of a voltage pulse to propel exogenous material through the cell membrane and into the cell allowing the modification of a given cell or cell population. An ideal electroporation system would possess four characteristics encompassing the benefits of all these systems: (1) high throughput, (2) high cell viability, (3) excellent deliver efficiency, and (4) controlled dosage. Many $advances^{1-2}$ in cell electroporation allow for high throughput, high cell viability, or excellent dosage control, yet no platform is available for the combination of all three. In this work, we show a “3D nanochannel electroporation (NEP) system” (Fig. 1a) on a silicon-chip platform designed to meet these three criteria. This “NEP chip” is patterned on one side using a ~500 nm circle array and the other using a 50 μm array. Each pattern is then etched through until connection is established as shown in Fig. 1b. The etching of the 3D NEP chip is done using the Bosch process, a combination of $SF_{6}$ and $C_{4}F_{8}$ plasma chemistries giving a highly directional etch for creation of high aspect ratio features. The result is a 3D nanochannel array consisting of nanopores that are ~500 nm in diameter and 20-25 μm deep. The backside microchannel array consists of wells that are 50 μm in diameter and ~225-230 μm deep.
Sponsorship	IEEE Electron Devices Soc.
Starting Page	83
Ending Page	84
File Size	557151
Page Count	2
File Format	PDF
ISBN	9781467381345
e-ISBN	9781467381352
DOI	10.1109/DRC.2015.7175566
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-06-21
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Three-dimensional displays Propulsion Reliability
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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