NDLI: What can we really expect from 2D materials for electronic applications?

Content Provider	IEEE Xplore Digital Library
Author	Logoteta, D. Zhang, Q. Fiori, G.
Copyright Year	2014
Description	Author affiliation: Dipt. di Ing. dell'Inf., Univ. di Pisa, Pisa, Italy (Logoteta, D.; Zhang, Q.; Fiori, G.)
Abstract	Ultra-thin two-dimensional materials are the recipient of high expectations by both research community and Industry, for their intrinsic electrical properties to be exploited in device applications. While it is nowadays clear that bare graphene will not manage to comply with ITRS [1] requirements for beyond-CMOS devices due to its main limitation i.e., the lack of a bandgap, hopes have been shifted towards 2D heterostructures, as well as alternative two-dimensional materials like Transition Metal Dichalcogenides (TMDs). In this presentation, we will quantitatively discuss performance of a broad range of 2D-material based devices through atomistic simulations, performed by means of the open-source code NanoTCAD ViDES. In particular, we will first focus on heterostructure based devices, which have already been demonstrated to provide large $I_{on}/I_{off}$ ratios, as for example lateral heterostructure FET [3] (Fig.1a, LHFET), and FETs based on vertical graphene-based heterostructures as in [4] (Fig. 1b VHFET) and in [5] (Fig. 1c, barristor). We will show that despite all the three solutions manages to provide large $I_{o}n/I_{off}$ ratios, the vertical structures have poor sub-threshold swing, and need large supply voltages to operate in normal conditions, unaffordable for digital applications (Fig. 2). Due to their extreme thickness, short-channel effects are strongly reduced in 2D-material based devices, which translates in an optimal control of the gate over the channel barrier, and which could be exploited in tunnel FET devices. We will show that $Bi_{2}Se_{3}$ could represent an option for TFET devices.
Starting Page	181
Ending Page	182
File Size	169616
Page Count	2
File Format	PDF
ISBN	9781479954056
e-ISBN	9781479954063
DOI	10.1109/DRC.2014.6872357
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-06-22
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Field effect transistors Performance evaluation Graphene Materials Photonic band gap Electronic mail Communities
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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