NDLI: A fine-grained technique of NBTI-aware voltage scaling and body biasing for standard cell based designs

Content Provider	IEEE Xplore Digital Library
Author	Yongho Lee Taewhan Kim
Copyright Year	2011
Description	Author affiliation: System LSI, Samsung Electronics, Korea (Yongho Lee) \|\| School of Electrical Engineering and Computer Science, Seoul National University, Korea (Taewhan Kim)
Abstract	As the technology scales, the increase of circuit delay over time due to NBTI (negative bias temperature instability) effect is not negligible any more. It has been known that voltage scaling is an effective scheme that is able to mitigate the NBTI effect. However, a careful control of voltage scaling is required not to increase the dissipation of dynamic power significantly. On the other hand, body biasing can also be used to mitigate the NBTI effect by lowering down the threshold voltage, but its effectiveness is limited, as will be demonstrated in this work, and it increases the leakage power. This work addresses an important problem of minimizing the power consumption of circuit while controlling the NBTI induced delay increase to meet the circuit timing constraint by simultaneously utilizing the effects of voltage scaling and body biasing on both NBTI and power consumption. Precisely, we solve the problem of finding a set of supply and body biasing voltage values to apply circuit clusters on standard cell based design to minimize the total power consumption while satisfying the constraint of circuit life time, considering the NBTI induced delay factor in circuit timing computation. By a comprehensive analysis on the relations between the values of supply and body biasing voltages and the values of the resulting power consumption and NBTI induced delay, we precisely formulate the problem, and transform it into a problem of convex optimization to solve it efficiently. Through extensive experimentation using ISCAS benchmark designs, it is shown that the proposed approach to the simultaneous exploitation of supply voltage and body biasing is able to produce designs with 14% and 8% reduced energy consumption on average over the designs produced by the design time NBTI-aware guard-banding based voltage scaling [20] and the run time NBTI-aware voltage scaling [4], respectively.
Starting Page	603
Ending Page	608
File Size	336256
Page Count	6
File Format	PDF
ISBN	9781424475155
ISSN	21536961
e-ISBN	9781424475162
DOI	10.1109/ASPDAC.2011.5722260
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-01-25
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Delay Threshold voltage Logic gates Convex functions Voltage control Energy consumption
Content Type	Text
Resource Type	Article

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