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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Juinn-Dar Huang Yi-Hang Chen Ya-Chien Ho |
| Copyright Year | 2011 |
| Description | Author affiliation: Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan, R.O.C. (Juinn-Dar Huang; Yi-Hang Chen; Ya-Chien Ho) |
| Abstract | As fabrication process exploits even deeper submicron technology, global interconnect delay is becoming one of the most critical performance obstacles in system-on-chip (SoC) designs nowadays. Recent years latency-insensitive system (LIS), which enables multicycle communication to tolerate variant interconnect delay without substantially modifying pre-designed IP cores, has been proposed to conquer this issue. However, imbalanced interconnect latency and communication back-pressure residing in an LIS still degrade system throughput. In this paper, we present a throughput optimization technique with minimal queue insertion. We first model a given LIS as a quantitative graph (QG), which can be further compacted using the proposed techniques, so that much bigger problems can be handled. On top of QG, the optimal solution with minimal queue size can be achieved through integer linear programming based on the proposed constraint formulation in an acceptable runtime. The experimental results show that our approach can deal with moderately large systems in a reasonable runtime and save about 28% of queues compared to the prior art. |
| Starting Page | 585 |
| Ending Page | 590 |
| File Size | 641026 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781424475155 |
| ISSN | 21536961 |
| e-ISBN | 9781424475162 |
| DOI | 10.1109/ASPDAC.2011.5722257 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2011-01-25 |
| Publisher Place | Japan |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Throughput IP networks Delay Relays Optimization Compaction System-on-a-chip |
| Content Type | Text |
| Resource Type | Article |
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