NDLI: VLSI Implementation of real-time Kalman filter

Content Provider	IEEE Xplore Digital Library
Author	Tze-Yun Sung Yu-Hen Hu
Copyright Year	1986
Description	Author affiliation: National Taiwan University, Taipei, Taiwan, R.O.C. (Tze-Yun Sung)
Abstract	In this paper, the problem of parallel implementation of the square-root Kalman filters is addressed. In the system level, our approach is to apply systolic type processor arrays as basic building blocks to speed up the matrix operations required in each iteration. Specifically, by utilizing a sparse matrix structure, we derive a simple systolic array configuration which is able to solve a rotation operation very efficiently. To maximize the parallelism, we also exploit an inter-array pipelining scheme through the overlapping of execution between successive processor arrays. As a result, several modules can be tightly coupled to form a dedicate Kalman Filter processor for real time applications. We estimate that with $O(n^{2})$ processors, it would take O(4n+3r-3) time units to complete one Kalman filter iteration, where n is number of states and r is number of inputs.
Starting Page	2223
Ending Page	2226
File Size	173261
Page Count	4
File Format	PDF
DOI	10.1109/ICASSP.1986.1169136
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1986-04-07
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Very large scale integration Parallel processing Filters Sparse matrices State estimation Costs Covariance matrix Equations Systolic arrays Process control
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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