NDLI: Embedding technology-a chip-first approach using BCB

Content Provider	IEEE Xplore Digital Library
Author	Topper, M. Buschick, K. Wolf, J. Glaw, V. Hahn, R. Dabek, A. Ehrmann, O. Reichl, H.
Copyright Year	1997
Description	Author affiliation: Tech. Univ. Berlin, Germany (Topper, M.)
Abstract	With the current trend to ever faster clock rates the propagation delays between the chips constitute a significant portion of the clock cycle. Mounting both active and passive devices as closely together as possible will therefore boost system's performance. Although flip-chipped devices have good performance, design constraints may prevent the placement of pads to comply with flip chip design rules. An additional advantage of the embedding technology is the possibility to employ 3-D stacking, the highest package density. Bare dice and standard passive components were embedded into a ceramic substrate to achieve a common, planar surface. Hence by employing thin-film processing all components can be directly interconnected to the copper routing of the module. Benzocylobutene (BCB) with its low curing temperature is preferred as dielectrical polymer for the embedding technology. Application of bonding or soldering techniques which might limit the reliability is avoided. This offers excellent electrical properties of the wiring system. By planarizing the reverse side of the MCM a low thermal resistance between heat sink and dice can be accomplished simultaneously for all embedded components. An SRAM MCM and a Thermotest MCM demonstrate the facibility of the embedding technology.
Starting Page	11
Ending Page	14
File Size	871309
Page Count	4
File Format	PDF
ISBN	0780338189
DOI	10.1109/ISAPM.1997.581243
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1997-03-09
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Clocks Dielectric substrates Thermal resistance Propagation delay System performance Flip chip Stacking Packaging Ceramics Dielectric thin films
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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