NDLI: A Technology-Agnostic Simulation Environment (TASE) for iterative custom IC design across processes

Content Provider	IEEE Xplore Digital Library
Author	Nalam, S. Bhargava, M. Ringgenberg, K. Ken Mai Calhoun, B.H.
Copyright Year	2009
Description	Author affiliation: Carnegie Mellon University (Bhargava, M.; Ken Mai) \|\| University of Virgnia (Nalam, S.; Ringgenberg, K.; Calhoun, B.H.)
Abstract	A designer's intent and knowledge about the critical issues and trade-offs underlying a custom circuit design are implicit in the simulations she sets up for design creation and verification. However, this knowledge is tightly conjoined with technology-specific features and decoupled from the final schematic in traditional design flows. As a result, this knowledge is easily lost when the technology specifics change. This paper presents a Technology Agnostic Simulation Environment (TASE), which is a tool that uses simulation templates to capture the designer's knowledge and separate it from the technology-specific components of a simulation. TASE also allows the designer to form groups of related simulations and port them as a unit to a new technology. This allows an actual design schematic to remain tied to the analyses that illuminate the underlying trade-offs and design issues, unlike the case where schematics are ported alone. Giving the designer immediate access to the trade-offs, which are likely to change in new technologies, accelerates the re-design that often must accompany porting of complicated custom circuits. We demonstrate the usefulness of TASE by investigating Read and Write noise margins for a 6T SRAM in predictive technologies down to 16 nm.
Starting Page	523
Ending Page	528
File Size	545208
Page Count	6
File Format	PDF
ISBN	9781424450299
ISSN	10636404
DOI	10.1109/ICCD.2009.5413107
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-10-04
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Process design Circuit simulation CMOS technology SPICE Silicon on insulator technology Circuit synthesis Random access memory Analytical models Analog circuits Semiconductor device modeling
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

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