NDLI: A performance analysis of the active memory system

Content Provider	IEEE Xplore Digital Library
Author	Witawas Srisa-An Srisa-an Chia-Tien Dan Lo J. Morris Chang
Copyright Year	2001
Description	Author affiliation: Dept. of Comput. Sci., Illinois Inst. of Technol., Chicago, IL, USA (Witawas Srisa-An)
Abstract	One major problem of using Java in real-time and embedded devices is the non-deterministic turnaround time of dynamic memory management systems (memory allocation and garbage collection). For the allocation, the nondeterminism is often contributed by the time to perform searching, splitting, and coalescing. For the garbage collection, the turnaround time is usually determined by the size of the heap, the number of live objects, the number of object collected, and the amount of garbage collected Even with the current state-of-the-art garbage collectors (generational and incremental schemes), they may or may not guarantee the worst case latency. Moreover such schemes often prolong overall garbage collection time. In this paper, the performance analysis of the proposed Active Memory Module (AMM) for embedded systems is presented Unlike the software counterparts, the AMM can perform a memory allocation in a predictable and hounded fashion (14 cycles). Moreover it can also yield a bounded sweeping time regardless of the number of live objects or heap size. By utilizing the proposed system, the overall speed-up can be as high as 23% over the JDK 1.2.2 running in classic mode.
Sponsorship	IEEE Comput. Soc.
Starting Page	493
Ending Page	496
File Size	404822
Page Count	4
File Format	PDF
ISBN	0769512003
ISSN	10636404
DOI	10.1109/ICCD.2001.955073
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2001-09-23
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Performance analysis Memory management Delay Embedded system Java Real time systems Runtime Hardware Computer science Technology management
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Performance Evaluation of a Self-Maintained Memory Module

Dynamic memory management for real-time embedded Java chips

Performance enhancements to the Active Memory System

Active memory processor: a hardware garbage collector for real-time Java embedded devices

BluEJAMM: A Bluespec Embedded Java Architecture with Memory Management

Performance estimation for real-time distributed embedded systems

Energy-aware runtime scheduling for embedded-multiprocessor SOCs

Runtime support for reconfigurable real-time embedded systems

A reconfigurable manager for dynamically reconfigurable hardware

A performance analysis of the active memory system

Similar Documents

Performance Evaluation of a Self-Maintained Memory Module

Dynamic memory management for real-time embedded Java chips

Performance enhancements to the Active Memory System

Active memory processor: a hardware garbage collector for real-time Java embedded devices

BluEJAMM: A Bluespec Embedded Java Architecture with Memory Management

Performance estimation for real-time distributed embedded systems

Energy-aware runtime scheduling for embedded-multiprocessor SOCs

Runtime support for reconfigurable real-time embedded systems

A reconfigurable manager for dynamically reconfigurable hardware

A performance analysis of the active memory system