NDLI: The VLSI 'silicon compiler' design process

Content Provider	IEEE Xplore Digital Library
Author	West, R.M.P.
Copyright Year	1989
Description	Author affiliation: IBM UK Lab. Ltd., Winchester, UK (West, R.M.P.)
Abstract	The author describes a VLSI design process developed by a team of logic designers and design-tools specialists at the IBM Laboratory at Hursley in England. A design, to be implemented in VLSI hardware, is partitioned into a number of smaller units. The design of each smaller unit is entered as text in a high-level language as a technology-independent behavioral description, which is then compiled for input to logic synthesis, where it is converted into an optimized design in the target VLSI technology. When all the smaller units to be integrated into a single VLSI integrated circuit (IC) have undergone this process, they are assembled together by a further run of logic synthesis. The resulting IC design, in the largest technology, is then processed to produce the artwork and test patterns required for manufacture of the IC. In support of all these activities, a number of programs exist to allow the design team to perform simulation, timing analysis, and validation of the logic-synthesis process.<>
File Size	605603
File Format	PDF
ISBN	0818619406
DOI	10.1109/CMPEUR.1989.93359
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1989-05-08
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Very large scale integration Silicon compiler Process design Integrated circuit synthesis Integrated circuit technology Logic design Hardware High level languages Design optimization Assembly
Content Type	Text
Resource Type	Article

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