NDLI: A LP/HP UMTS/GSM ΣΔ ADC suited for a Zero-IF/Low-IF receiver

Please wait, while we are loading the content...

2015 IEEE International Symposium on Circuits and Systems (ISCAS)

2014 IEEE International Symposium on Circuits and Systems (ISCAS)

2013 IEEE International Symposium on Circuits and Systems (ISCAS2013)

2012 IEEE International Conference on Circuits and Systems (ICCAS)

2012 IEEE International Symposium on Circuits and Systems

2011 IEEE International Symposium of Circuits and Systems (ISCAS)

ISCAS table of contents

A 6-bit 1.3-GS/s flash ADC using a gain-compensated THA and an offset-averaging preamplifier array

Nyquist-rate time-interleaved current-steering DAC with dynamic channel matching

A 2.5GS/s 3-bit time-based ADC in 90nm CMOS

An ultra-low-power SAR ADC with an area-efficient DAC architecture

11 GHz UGBW Op-amp with feed-forward compensation technique

A 15.5 dB, wide signal swing, dynamic amplifier using a common-mode voltage detection technique

A current-mirror opamp with switchable transconductances for low-power switched-capacitor integrators

Self-biased dual-path push-pull output buffer amplifier topology for LCD driver applications

A high-voltage-enabled recycling folded cascode OpAmp for nanoscale CMOS technologies

A quiescent power-aware low-voltage output capacitorless low dropout regulator for SoC applications

A versatile low-dropout voltage regulator for automotive applications

An output-capacitor-free adaptively biased low-dropout regulator with sub-threshold undershoot-reduction for SoC

A low power high speed envelope detector for serial data systems in 45nm CMOS

Design optimization of an output capacitor-less low dropout regulator with compensation capcitance reduction and slew-rate enhancement technique

A dense 45nm half-differential SRAM with lower minimum operating voltage

A subthreshold dynamic read SRAM (DRSRAM) based on dynamic stability criteria

A novel technique to measure data retention voltage of large SRAM arrays

A 1.85fW/bit ultra low leakage 10T SRAM with speed compensation scheme

Efficient voltage conversion for SRAM low standby power modes

Simplified logic design methodology for fuzzy membership function based robust detection of maternal modulus maxima location: A low complexity Fetal ECG extraction architecture for mobile health monitoring systems

A pseudo-online Brain-Computer Interface with automatic choice for EEG channel and frequency

Rapid prototyping of the Goertzel algorithm for hardware acceleration of exon prediction

Noise reduction filters based on pointwise MAP for CT images

Image registration method for 2D representation of wireless Micro-Ball endoscopic images

Perceptual image compression via adaptive block- based super-resolution directed down-sampling

Browser-friendly hybrid codec for compound image compression

Highly parallel image coding for many cores

Efficient dictionary based video coding with reduced side information

Multiple sub-pixel interpolation filters with adaptive symmetry for high-resolution video coding

A new switch-mode noise-constrained transform domain NLMS adaptive filtering algorithm

A high-speed FIR adaptive filter architecture using a modified delayed LMS algorithm

An adaptive approach for contextual audio denoising using local Fisher information

Enhanced adaptive playout scheduling and loss concealment techniques for Voice over IP networks

A new low complexity iterative equalization architecture for high-speed receivers on highly dispersive channels: Decision feedforward equalizer (DFFE)

“A MATLAB based optimum multiband FIR filters design program following the original idea of the Remez multiple exchange algorithm”

Design of variable bandedge FIR filters with extremely large bandedge variation range

Switching activity analysis and power estimation for multiple constant multiplier block of FIR filters

Successive approximation FIR filter design

Multi-clock domain analysis and modeling of all-digital frequency synthesizers

MEMS-based all-digital frequency synthesis for ultralow-power radio for WBAN and WSN applications

First order noise shaping in all digital PLLs

Jitter-Power minimization of digital frequency synthesis architectures

Use of time variant digital sigma-delta for fractional frequency synthesizers

A novel SST transmitter with mutually decoupled impedance self-calibration and equalization

Design of high-speed clock recovery circuit for burst-mode applications

250Mb/s to 3Gb/s unilateral continuous rate CDR using precise frequency detector and 1/5-rate linear phase detector

A 10 to 11.5GHz rotational phase and frequency detector for clock recovery circuit

An inductor-less 13.5-Gbps 8-mW analog equalizer for multi-channel multi-frequency operation

Slew-rate controlled 800Mbps transmitter in 65nm CMOS

CMOS Envelope Tracking amplifier IC design for high-efficiency RF polar transmitters

Design of concurrent multi-band matching networks

Autonomous predistortion calibration of an RF power amplifier

A Cartesian Feedback Feedforward Transmitter

Low phase noise on-chip oscillator for implantable biomedical applications

On the bias noise to phase noise conversion in harmonic oscillators using Groszkowski theory

A phase-noise model for nonlinear piezoelectrically-actuated MEMS oscillators

A regulated 3.1–10.6 GHz linear dual-tuning differential ring oscillator for UWB applications

Supply noise insensitive ring VCO with on-chip adaptive bias-current and voltage-swing control

A 14V-output adaptive-off-time boost converter with quasi-fixed-frequency in full loading range

A high-efficiency PWM DC-DC buck converter with a novel DCM control under light-load

Active-clamp ZVS two-switch flyback converter

Integrated SIMO DC-DC converter with on-line charge meter for adaptive PCCM operation

Nonisolated high step-up stacked dc-dc converter based on boost converter elements for high power application

Comparator-based switched-capacitor pipelined ADC with background offset calibration

An 11b pipeline ADC with dual sampling technique for converting multi-carrier signals

An energy-efficient 1MSps 7µW 11.9fJ/conversion step 7pJ/sample 10-bit SAR ADC in 90nm

A deflection criterion for time-interleaved analog-to-digital converters

SNR measurement based on linearity test for ADC BIST

Design considerations and experimental results of continuously-tuned reconfigurable CMOS LNAs

A low power UWB very low noise amplifier using an improved noise reduction technique

A compact CMOS UWB LNA using tunable active inductors for WLAN interference rejection

Orthogonally tunable inductorless RF LNA for adaptive wireless systems

A single-to-differential LNA topology with robust output gain-phase balancing against balun imbalance

Versatile capabilities of digitally controlled integrated dc-dc converters

Ultra-fast hysteretic single-inductor-dual-output boost regulator with predictable noise spectrum and minimized cross-regulation

Continuous-time CMOS adaptive asynchronous ΣΔ modulator approximating low-ƒs low-inband-error on-chip wideband power amplifier

Development of energy-efficient fast-transient CMOS low-dropout regulators for SoC applications

Harvesting circuits for miniaturized photovoltaic cells

A dual-loop delay locked loop with multi digital delay lines for GHz DRAMs

Fast parallel CRC & DBI calculation for high-speed memories: GDDR5 and DDR4

Complementary structure of memristive devices based passive memory arrays

A low-power dual-rail inputs write method for bit-interleaved memory cells

Programming algorithms for multilevel phase-change memory

Blended engineering course - Electric Circuit Theory case study

Embedded web server for remote laboratory access for undergraduate students studying electronic engineering

Education of Digital and Analog Circuits supported by computer algebra system

How to teach memristors in EE undergraduate courses

Nullators and norators in circuits education: A benefit or an obstacle?

Enhancing keyword-based web video search with multi-modal information expansion

Distributed multi-camera object tracking with Bayesian Inference

A new network-based algorithm for multi-camera abnormal activity detection

Stereoscopic learning for disparity estimation

Halftone image classification using LMS algorithm and naïve Bayes

On the Cramér-Rao bound of autoregressive estimation in noise

DOA estimation of coherent signals for uniform linear arrays with mutual coupling

An improved model of jitter effects in analog-to-digital conversion

Distributed Kalman Filter using fast polynomial filter

Minimum redundancy linear sparse subarrays for direction of arrival estimation without ambiguity

An Improved method for the design of variable fractional-delay IIR digital filters

Minimax design of stable IIR filters with sparse coefficients

A spectrum sensing method based on stratified sampling

Efficient coefficient partitioning for decomposed DA-based inner-product computation

Optimization and implementation of continuous time DSP-systems by using granularity reduction

Digital frequency synthesizer using adaptive mode-coupled resonator mechanism for low phase noise and low jitter applications

Multipath adaptive cancellation of divider non-linearity in fractional-N PLLs

Spurs suppression and deterministic jitter correction in all-digital frequency synthesizers, current state and future directions

All-digital RF frequency modulation

A 5.4 Gb/s clock and data recovery circuit using the seamless loop transition scheme without phase noise degradation

A high speed transceiver front-end design with fault detection for FlexRay-based automotive communication systems

High-speed and low complexity carrier recovery for DP-QPSK transmission

Low complexity baseband transceiver design for narrow band power line communication

A 10 Gb/s low-power serdes receiver based on a hybrid speculative/SAR digitization technique

A progammable baseband anti-alias filter for a passive-mixer-based, SAW-less, multi-band, multi-mode WEDGE transmitter

MDFT filter bank multicarrier systems with multiple transmission zeros

All digital time tracking loop for DVB-H and DVB-T

A channel estimation scheme for Chinese DTTB system combating long echo and high doppler shift

Improved matching pursuit algorithm and architecture for LTE Channel Estimation

A band-reject nested-PLL phase-noise reduction scheme for clock-cleaners

A wide-tuning quasi-type-I PLL with voltage-mode frequency acquisition aid

Glitch-Free Multi-Modulus Frequency Divider for Quantization Noise suppression in fractional-N PLLs

A new frequency synthesizers stabilization method based on a mixed Phase Locked Loop and Delay Locked Loop architecture

All digital phase-locked loop using active inductor oscillator and novel locking algorithm

A common grounded Z-source buck-boost converter

Switch bootstrapping technique for voltage doublers and double charge pumps

Study and implementation of high frequency pulse LED driver with self-oscillating circuit

Cost efficient mains powered supply concepts for wireless sensor nodes

A fully integrated wide-band PID controller with capacitor-less compensation for step-down DC-DC converter

A 1V 15-bit Audio ΔΣ ADC in 0.18µm CMOS

Analysis of random capacitor mismatch errors in pipeline analog-to-digital converters

A 40-nm $640-µm^{2}$ 45-dB opampless all-digital second-order MASH ΔΣ ADC

An incremental sigma delta converter for compressive sensing applications

The inconvenient truth about alias rejection in continuous time ΔΣ converters

A 65nm CMOS current-mode receiver front-end

A 2.4µW Wake-up Receiver for wireless sensor nodes with −71dBm sensitivity

A 2-pin input multi frequency power scavenging unit for wireless sensor nodes and RFID tags

Adaptive calibration of IIP2 in direct down-conversion mixers with modified LMS algorithm

An ISM 2.4 GHz low-IF receiver frontend

Variable-duty-cycle scheduling in double-edge-triggered flip-flop-based high-level synthesis

TG Master-Slave FFs: High-speed optimization

A clock gated flip-flop for low power applications in 90 nm CMOS

DET FF topologies: A detailed investigation in the energy-delay-area domain

Evaluation of 90nm 6T-SRAM as Physical Unclonable Function for secure key generation in wireless sensor nodes

Power-aware design with various low-power algorithms for an H.264/AVC encoder

Area-efficient fast scheduling schemes for MVC prediction architecture

A high throughput H.264/AVC intra-frame encoding loop architecture for HD1080p

A multilevel data reuse scheme for Motion Estimation and its VLSI design

An energy-efficient 8×8 2-D DCT VLSI architecture for battery-powered portable devices

ISCAS 2011 special sessions on education innovations and experiences

Analysis of assessment using signals, systems concept inventory for systems courses

Rethinking Fourier's legacy in signals and systems education

On the relation of circuit theory and signals, systems and communications

Interactive lecturing techniques

Fast mode decision by using probabilities from arithmetic coder

Enhanced line-based intra prediction with fixed interpolation filtering

Integration of Plane Mode with Multiple Predictor Sets in Intra Prediction for video coding

Mode-dependent fast separable KLT for block-based intra coding

A deadline-aware virtual contention free EDCA scheme for H.264 video over IEEE 802.11e wireless networks

A Unitary ESPRIT algorithm for carrier frequency offset estimation

Subband blind source separation considering acoustic reverberation characteristics

An improved method for blind separation of complex-valued signals via joint diagonalization

Signal recovery in PDM optical communication systems employing independent component analysis

A blind technique for total interference rejection

FPGA implementation of a spiking neural network for pattern matching

Combining ISA extensions and subsetting for improved ASIP performance and cost

Bit-parallel Multiple Constant Multiplication using Look-Up Tables on FPGA

Implementation of time-multiplexed sparse periodic FIR filters for FRM on FPGAs

Asynchronous-QDI 2D IIR digital filter circuits

Maximum likelihood parameter estimation of a spiking silicon neuron

A combinational digital logic approach to STDP

Mismatch reduction through dendritic nonlinearities in a 2D silicon dendritic neuron array

An in-silico glial microdomain to invoke excitability in cortical neural networks

The time machine: A novel spike-based computation architecture

Detecting multi-mode MIMO signals: Algorithm and architecture design

Scalar quantizer based feedback of the Channel Direction Information in MU-MISO systems

Low-complexity design of A 8×8 modulation configurable K-best MIMO detector

Performance analysis of lattice-reduction algorithms for a novel LR-compatible K-Best MIMO detector

FPGA implementation of channel estimation for MIMO-OFDM

A new algorithm for double scalar multiplication over Koblitz curves

A dual-field elliptic curve cryptographic processor with a radix-4 unified division unit

A maximal entropy digital chaotic circuit

Counteracting power analysis attack using Static Single-ended Logic

An oscillator-based true random number generator with jitter amplifier

Synchronization of the Kuramoto model with multi-scale-free property

Synchronization of bounded piecewise smooth systems

Master Stability Function for networks of Chua's circuits with static and dynamic couplings

Synchronization of networks of non-identical Chua circuits: Analysis and experiments

Synchronizing coupled oscillators in polygonal networks with frustration

Power conversion efficiency of class-E power amplifier outside nominal operation

Reduction of equivalent series inductor effect in constant on- time control DC-DC converter without ESR compensation

A 80V output voltage boost converter with low voltage ripple for Avalanche Photodiode(APD)

Single controller current balance (SCCB) technique for voltage-mode multi-phase buck converter

Assessment of direct VRM topologies

Software based separation of amplitude and phase noises in time domain

Verilog-A modeling of SPAD statistical phenomena

Design and analysis of fuzzy logic based robust PID controller for PWM-based switching converter

A novel operating-point driven method for the sizing of analog IC

Comparative analysis of information rates of simple amplifier topologies

Photocurrent dependent response of a SPAD biased by a charge pump

Current Mode Feed-Forward Gain Control for 0.8V CMOS hearing aid

Bio-inspired nano-photodiode for Low Light, High Resolution and crosstalk-free CMOS image sensing

A low power independent component analysis processor in 90nm CMOS technology for portable EEG signal processing systems

Compressed sensing reconstruction: Comparative study with applications to ECG bio-signals

A multiparametric biosensor array for on-chip cell culture with feedback controlled microfluidics

A high voltage battery charger with smooth charge mode transition in BCD process

Bonding-wire triangular spiral inductor for on-chip switching power converters

Meshing strategy of equivalent substrate schematic in SMART power IC

A novel control technique to eliminate output-voltage-ripple in switched-capacitor DC-DC converters

A 300mV Low-voltage start-up circuit for energy harvesting systems

A semi-static threshold-triggered delay element for low power applications

Design exploration of a 65 nm Sub-VT CMOS digital decimation filter chain

A low-power 8-bit SAR ADC for a QCIF image sensor

Improve accuracy of delay element by filtering false path for low power desychronized circuits

Comparative analysis of contrast enhancement algorithms in surveillance imaging

A FPGA based fast runtime reconfigurable real-time Multi-Object-Tracker

Auto-generated strokes for motion segmentation

An efficient image interpolation algorithm based upon the switching and self learned characteristics for natural images

A neuromorphic cross-correlation chip

A programmable axonal propagation delay circuit for time-delay spiking neural networks

Systematic configuration and automatic tuning of neuromorphic systems

Analogue CMOS circuit implementation of a dopamine modulated synapse

An improved FPGA implementation of CNN Gabor-type filters

Simple improvement stage for low voltage WTA and Rank Order circuits

Active and passive dynamic cascode calibration schemes for high precision current sources

All-CMOS subbandgap reference circuit operating at low supply voltage

Energy harvesting circuit using integrated transformer

A sub-1V CMOS voltage reference generator

Fast transient response capacitor-free linear voltage regulator in 65nm CMOS

Novel MIMO 4-DOF position control for Capsule Endoscope

Channel characterization for implant to body surface communication

Duty Cycle Shift Keying data transfer technique for bio-implantable devices

Channel characterization for galvanic coupled in vivo biomedical devices

Comparison of digital LQR techniques for DC-DC boost converters with large load range

Delta-sigma buck converter — A design exploration for GSM Wireless systems

Current-mode synthetic control (CSC) technique for high efficiency DC-DC boost converters over a wide load range

Electrical characteristics of novel ESD protection devices for I/O and power clamp

$P^{2}E-DWT:$ A parallel and pipelined efficient VLSI architecture of 2-D Discrete Wavelet Transform

A parallel and area-efficient architecture for deblocking filter and Adaptive Loop Filter

TV energy management by camera-based viewer monitoring

Integer-pel Motion Estimation specific instructions and their hardware architecture for ASIP

Novel fractional motion estimation algorithm and architecture using Sub-block Combination

Antenna-array 2D-IIR digital filters for carrier-modulated frequency-agile and cognitive wireless systems

Spurious emissions reduction using multirate RF transmitter

Design and parallel implementation of an adaptive baseline wander compensator for high-speed optical coherent receivers

A convex optimization approach to reducing peak-to-average-power ratio in OFDM

MEMS with Σ - Δ type of feedback loop control as an iterative map

A 0.24 to 2.4 GHz phase-locked loop with low supply sensitivity in 0.18-µm CMOS

Linear range extensible Phase Frequency Detector and Charge Pump for fast frequency acquisition

Linearization of ADCs via digital post processing

A broadband fully on-chip low noise amplifier for square kilometre array radio telescope

A 3mW 8-Bit radiation-hardened-by-design DAC for ultra-wide temperature range from −180°C to 120°C

Design and analysis of a switched-capacitor-based peak detector

A distributed amplifier based dispersive delay line

A Temperature-stable 60-dB programmable-gain amplifier in 0.13-µm CMOS

A physiological valence/arousal model from musical rhythm to heart rhythm

CMOS low current measurement system for biomedical applications

A novel method to count the red blood cells in thin blood films

Classification of brain MRI using the LH and HL wavelet transform sub-bands

Active noise cancellation of motion artifacts in pulse oximetry using isobestic wavelength light source

Quasi-analytical spectrum of PWM signals with dead-time for multiple sinusoidal input

Application of probabilistic Tabu Search to distribution system service restoration

Nonlinear control evaluation of two-stage matrix converter using ideal and non-ideal IGBT Models

What is the importance of selecting features for non-technical losses identification?

Towards optimal CMOS lifetime via unified reliability modeling and multi-objective optimization

Nonspeculative decimal signed digit adder

Spatial- and temporal-reliability aware design for nano-scale VLSI circuits

Multiplier structures for low power applications in deep-CMOS

An improved model for delay/energy estimation in near-threshold flip-flops

Low complexity block-based unbiased frequency estimation

Bi-criterion optimization of non-uniform filter banks for acoustic echo cancellation

Edge detection using histogram equalization and multi-filtering process

Implementation of a motion sickness evaluation system based on EEG spectrum analysis

Optimal signal discrimination in a Low signal-to-noise ratio environment

A one-layer recurrent neural network for constrained single-ratio linear fractional programming

Recurrent neural network as a KWTA selector: A synthesis procedure

GPS offset estimation and correction using satellite constellation information

Prototype rotation based assisted image analysis for 3D vision system

Prediction of core losses on a three-phase transformer using neural networks

A low-power ΣΔ ADC optimized for GSM/EDGE standard in 65-nm CMOS

Sine-shaping mixer for continuous-time ΣΔ ADCs

A 6.25 MHz BW 8-OSR fifth-order single-stage sigma-delta ADC

High-order continuous-time incremental ΣΔ ADC for multi-channel applications

A LP/HP UMTS/GSM ΣΔ ADC suited for a Zero-IF/Low-IF receiver

Requirement driven low-power LC and ring oscillator design

A 1 mW low phase-noise relaxation oscillator

A 3.125 GHz four stage voltage controlled ring oscillator in 0.18 CMOS

A 27-GHz low-power push-push LC VCO with wide tuning range in 65nm CMOS

A dual-mode VCO based low-power synthesizer with optimized automatic frequency calibration for software-defined radio

Confession session: Learning from others mistakes

A simple radix-4 Booth encoded modulo $2^{n}+1$ multiplier

A RNS Montgomery multiplication architecture

A low-energy hybrid radix-4/-8 multiplier for portable multimedia applications

A 145µW 8×8 parallel multiplier based on optimized bypassing architecture

A recursive-divide architecture for multiplication and division

Learning to Conceive, Design, Implement and Operate Circuits and Systems

Teaching circuits to new generations of engineers

An online adaptive tutoring system for design-centric courses

Circuits and systems engineering education through interdisciplinary team-based design projects

An introductory capstone design course on embedded systems

Floorplanning driven Network-on-Chip synthesis for 3-D SoCs

A unified optimization framework for simultaneous gate sizing and placement under density constraints

A hierarchical 3-D floorplanning algorithm for many-core CMP networks

Distributed LC resonant clock tree synthesis

Register On MEsh (ROME): A novel approach for clock mesh network synthesis

Reconfigurable inverse transform architecture for multiple purpose video coding

A learning-based video compression on low-quality data by unscented kalman filters with Gaussian process regression

Frame-level quantization control for perceptual quality constrained H.264/AVC video coding

Blind PSNR estimation using shifted blocks for JPEG images

Estimating relative objective quality among images compressed from the same original

Roesser model realization of MIMO n-D systems by elementary operations

Algebraic integer based 8×8 2-D DCT architecture for digital video processing

Clock jitter estimation in noise

FPGA Implementation of an ASIP for high throughput DFT/DCT 1D/2D engine

A high-speed low-complexity modified $radix-2^{5}$ FFT processor for gigabit WPAN applications

On the complex Kernel-based adaptive filter

Adaptive identification of sparse systems with variable sparsity

Fault Tolerant Adaptive Filters based on modified discrete fourier transform architectures

Digital post-linearization of a Wideband Low Noise Amplifier for ultra-wideband wireless receivers

Sub-channel equalizer design based on geometric interpolation for FBMC/OQAM systems

A 24 GHz quadrature pulsed oscillator for short-range UWB vehicular radar applications

Reduced-size ultra-wideband true-time-delay beam-forming receivers

A 2–6GHz broadband CMOS low-noise amplifier with current reuse topology utilizing a noise-shaping technique

A non-coherent FSK-OOK UWB impulse radio transmitter for clock-less synchronization

A 5.2 pJ/pulse impulse radio pulse generator in 90 nm CMOS

Low-complexity architectures for reliability-based message-passing non-binary LDPC decoding

Sliding Window Method for stochastic LDPC decoder

A high-throughput LDPC decoder architecture for high-rate WPAN systems

An adaptive analog low-density parity-check decoder based on margin propagation

QC-LDPC Decoding Architecture based on Stride Scheduling

Bifurcation and basin in two coupled parametrically forced logistic maps

Symmetry-breaking bifurcation in load resonant dc-dc converters

Resonate and fire dynamics in Complex Oscillation Based Test of analog filters

Design of grid multi-wing butterfly chaotic attractors from piecewise Lü system based on switching control and heteroclinic orbit

On rigorous integration of piece-wise linear continuous systems

Electrostatic vibration energy harvester with piezoelectric start-up generator

Design and modeling of an underwater energy harvesting system

Switched capacitor DC-DC converter in 65nm CMOS technology with a peak efficiency of 97%

Switched-capacitor based step-up converter for alternative energy applications

EMC influence of the charge pump in linear regulators - Design, simulation and measurements

A novel implementation of dithered digital delta-sigma modulators via bus-splitting

A second-order switched-capacitor ΔΣ modulator using very incomplete settling

A low-power third-order ΔΣ modulator using a single operational amplifier

A 400 MHz delta-sigma modulator for bandpass IF digitization around 100 MHz with excess loop delay compensation

Generalized multi-stage closed loop sigma delta modulator

Adaptation algorithms for a class of continuous time analog equalizers with application to serial links

A 5s-time-constant temperature-stable integrator for a tuneable PID controller in LOC applications

Electronic time stretching for fast digitization

Integrated multi-tap transformer for reconfigurable multimode matching networks

A high linear low flicker noise 25% duty cycle LO I/Q mixer for a FM radio receiver

Design of power-rail ESD clamp circuit with adjustable holding voltage against mis-trigger or transient-induced latch-on events

Addressing crosstalk issue in on-chip carbon nanotube interconnects using negative capacitance

Noise coupling due to through silicon vias (TSVs) in 3-D integrated circuits

A low noise, Fast Pixel Readout IC working in single photon counting mode with energy window selection in 90 nm CMOS

A 12Gbps all digital low power SerDes transceiver for on-chip networking

A 1.2V 6.4GHz 181ps 64-bit CD domino adder with DLL measurement technique

Desynchronize a legacy floating-point adder with operand-dependant delay elements

A new RNS scaler for { ${2^{n}− 1, 2^{n}, 2^{n} + 1}$}

Design of multi-residue generators using shared logic

Minimum adder depth multiple constant multiplication algorithm for low power FIR filters

0.5V wavelet filters using current mirrors

Ultra-low power self-calibrating BPSK demodulator for bio-implantable chips

A 16-channel low-noise programmable system for the recording of neural signals

A 0.6V CMOS Image Sensor with in-pixel biphasic current driver for biomedical application

Design of widely tunable Mexican hat wavelet filter for cardiac signal analysis

Early case splitting and false path detection to improve high level ATPG techniques

A fast and stable explicit integration method by matrix exponential operator for large scale circuit simulation

Novel simulation approach for 3G W-CDMA receivers

A heuristic algorithm for reducing system-level test vectors with high branch coverage

CNF encodings of cardinality in formal methods for robustness checking of gate-level circuits

Performance evaluation of Jpeg2000 implementation on VLIW cores, SIMD cores and multi-cores

Effective multi-standard macroblock prediction VLSI design for reconfigurable multimedia systems

A parallel architecture for ray-tracing with an embedded intersection algorithm

Sub-pixel downsampling of video with matching highly data re-use hardware architecture

Predictive Dynamic Frequency Scaling for Multi-Processor Systems-on-Chip

Orthonormal eigenvectors of the DFT-IV matrix by the eigenanalysis of a nearly tridiagonal matrix

The 2-D Modulated Discrete Fourier Transform for 2-D fast convolution and digital filtering

Filterbank-based fast parallel algorithms for 2-D DHT-based real-valued discrete Gabor transform

An efficient algorithm for the conjugate symmetric sequency-ordered complex Hadamard transform

Jacket Haar transform

Emerging applications for multi/many-core processors

GPU-enabled parallel processing for image halftoning applications

A highly-integrated biomedical multiprocessor system for portable brain-heart monitoring

Applications of the virtual cellular machine to many-core processors

UWB beamforming architecture for RTLS applications using digital phase-shifters

A harmonic-suppressed regenerative divide-by-5 frequency divider for UWB applications

An integrated beamformer for IR-UWB receiver in 0.18-µm CMOS

Analog front-end RX design for UWB impulse radio in 90nm CMOS

A 3.1-8 GHz CMOS UWB front-end receiver

A wide dynamic range CMOS image sensor with the optimum photoresponse per pixel

A processor element for a mixed signal cellular processor array vision chip

A 3-pin 1V 115µW 176×144 autonomous active pixel image sensor in 0.18µm CMOS

Sensitivity and uniformity of a 0.18µm CMOS temporal contrast pixel array

Optical characterization of a polarization imager

Performance analysis of differential chaotic shift keying communications in MIMO systems

Improving the computer network intrusion detection performance using the relevance vector machine with Chebyshev chaotic map

Efficient attack strategy to communication networks with partial degree information

Roles of betweenness in controlling catastrophic cascading failures on scale-free networks

A study of synchronization of complex networks via pinning control

Small-signal modeling of PWM Z-source converter by circuit-averaging technique

Fixed-frequency Pseudo Sliding Mode control for a Buck-Boost DC-DC converter in mobile applications: A comparison with a linear PID controller

Discrete-time H∞ control of PWM inverters: Experimental results complying with IEC 62040-3

Cross-Regulation-Suppression control scheme for CCM Single-Inductor-Dual-Output buck converter with ordered-power-distributive control

Analysis of a high-voltage-gain hybrid switched-capacitor buck converter

Binary Access Memory: An optimized lookup table for successive approximation applications

A signal-specific successive-approximation analog-to-digital converter

Accurate stability prediction of single-bit higher-order delta-sigma (Δ-Σ) modulators for speech codecs

An online fully-digital calibration of leakage noise in MASH continuous time ΔΣ modulators

Sensitivity analysis of pulse-width jitter induced noise in continuous-time delta-sigma modulators to out-of-band blockers in wireless receivers

A 0.47mW $6^{th}-order$ 20MHz active filter using highly power-efficient Opamp

$4^{th}-Order$ 84dB-DR CMOS-90nm low-pass filter for WLAN receivers

Synthesis of linear-phase selective filters based on maximum of time-domain response

Analog 2D fan filters from discrete domain transfer functions

A novel reconfigurable alias interference cancellation technique for A-to-D conversion

Estimation of thermal status in multi-core systems

Area-efficient dynamic thermal management unit using MDLL with shared DLL scheme for many-core processors

A circuit implementation for dynamic thermal management techniques

Thermal-aware energy minimization of 3D-stacked L3 cache with error rate limitation

Energy-aware dynamic task mapping for NoC-based MPSoCs

Efficient implementation of secondary synchronization symbol detection in 3GPP LTE

High speed eight-parallel mixed-radix FFT Processor for OFDM systems

VLSI architecture for a reconfigurable Spectrally Efficient FDM baseband transmitter

A 12 Gb/s chip-to-chip AC coupled transceiver

Reconfigurable cell array for concurrent support of multiple radio standards by flexible mapping

High CMRR power efficient neural recording amplifier architecture

A power efficient neural spike recording channel with data bandwidth reduction

A fully-adjustable dynamic range capacitance sensing circuit in a 0.15µm 3D SOI process

CMOS DAC-sharing stimulator for neural recording and stimulation arrays

A 2.4µW 400nC/s constant charge injector for wirelessly-powered electro-acupuncture

An approach based on edge coloring of tripartite graph for designing parallel LDPC interleaver architecture

Template-based layout retargeting for analog and rf integrated circuits

An implementation of the circuit multiobjective optimization with the weighted sum strategy and goal attainment method

Analysis of Mean-Square-Error (MSE) for fixed-point FFT units

An efficient algorithm of performing range analysis for fixed-point arithmetic circuits based on SAT checking

Unconstrained regularized ℓp-norm based algorithm for the reconstruction of sparse signals

Real-time compressed sensing-based electrocardiogram compression on energy-constrained wireless body sensors

Generic sensing hardware and real-time reconstruction for structured analog signals

Compressed sensing for DOA estimation with fewer receivers than sensors

Generalized 2D lattice structure for causal and noncausal modeling of random fields

Direct design of phase factor in the common-factor technique for Hilbert-Pairs

Assessment of NPR MDFT filter banks for subband coding and data transmission

A method to convert near-perfect into perfect reconstruction FIR prototype filters for modulated filter banks

Area, throughput, and energy-efficiency trade-offs in the VLSI implementation of LDPC decoders

Multi-layer parallel decoding algorithm and vlsi architecture for quasi-cyclic LDPC codes

Low power LDPC decoder with efficient stopping scheme for undecodable blocks

LDPC decoder architecture for high-data rate personal-area networks

Hardware implementation challenges of modern error control decoders

Wide dynamic range, 0.8 to 6 GHz LNA in 45 nm digital SOI CMOS

A low-power CMOS current-reused RF front-end receiver with dual loop feedback

A 1.5 GHz high-Q receiver based on current reuse

A Double notch RF filter architecture for SAW-less GPS receivers

Digital energy detection for OOK demodulation in ultra-low power radios

A self-biased PLL-tuned AER pixel for high-speed infrared imagers

Noise analysis of a current-mode read circuit for sensing magnetic tunnel junction resistance

Dual VDD block based CMOS image sensor - preliminary evaluation

A 32×32 single photon avalanche diode imager with delay-insensitive address-event readout

Noise modeling of Stokes parameters in division of focal plane polarization imagers

SPICE modeling of memristors

Modeling and analysis of nonlinearities and bandwidth limitations in RF receivers

Nonlinear behavior of electrostatic discharge protection structures under high-power microwave excitation: Modeling and simulation

A new approach for electrothermal analysis of electronic circuits

A novel optimization method for CT sigma-delta-modulators using a switched system model

Hybrid intelligent system for daily maximum temperature forecasting in smart grids

A fast method for islanding analysis in power system grids

A mixed-signal platform dedicated to power system dynamic computation

Circuit model of a phase-shifting transformer for analog power flow emulation

High frequency and low power semi-synchronous PFM state machine

A Fast Lock-in PLL using a quadratic V-I self-tracking charge pump and a replica-biased ring VCO

−99dBc/Hz@10kHz 1MHz-step dual-loop integer-N PLL with anti-mislocking frequency calibration for global navigation satellite system receiver

Third order harmonic cancellation technique for a parametric amplifier

A highly linear mixer with inherent balun using a new technique to remove common mode currents

Analysis of transformer-based resonator quality factor and bandwidth and the implications to VCOs

Behavioral modeling of direct sampling mixer

Power efficiency in communication systems from a circuit perspective

Adaptive power reconfigurability for decreasing power dissipation of wireless personal area network receivers

Computationally-efficient iterative decoding for storage system design: Min-Sum refined

Current-slope-controlled adaptive-on-time DC-DC converter with fixed frequency and fast transient response

An energy-based heuristic operator method for resonant power circuit estimation predicting parameter sensitivity

Limit cycle control of an industrially applied resonant converter modelled as a hybrid system

An alternative strategy for reducing mode transitions in a four-switch buck-boost converter

A step-up μ-power converter for solar energy harvesting applications, using Hill Climbing maximum power point tracking

A priority based output arbiter for NoC router

A flexible hardware implementation of SHA-1 and SHA-2 Hash Functions

Improved asynchronous-logic dual-rail Sense Amplifier-based Pass Transistor Logic with high speed and low power operation

Reconfigurable clock polarity assignment for peak current reduction of clock-gated circuits

Design methodology of multistage time-domain logic speculation circuits

Implementation of all-digital wideband RF frequency synthesizers in 65-nm CMOS technology

A thermal-aware task mapping flow for coarse-grain dynamic reconfigurable processor

Parallel Dynamic Voltage and Frequency Scaling for stream decoding using a multicore embedded system

An area-efficient high-accuracy prediction-based CABAC decoder architecture for H.264/AVC

Image based approach with k-mean clustering for the compression of human motion sequences

Robust synchronization technique for chaotic symbolic dynamics modulation

Optimization of quartic double-well bistable stochastic resonance system

A chaotic motion controller for camera networks

Pseudo-chaotic lossy compression of TRBGs

Distance sensing for mini-robots: RSSI vs. TDOA

Live demonstration: Packet-based AER with 3Gevent/s cumulative throughput

Live demonstration: Real-time image processing on ASPA2 vision system

Live demonstration: Material detection via an integrated polarization imager

Live demonstration: Electronic doubler of electricity

Live demonstration: The prototype of real-time image pre-processing system for satellites' remote sensing

Live demonstration: A CMOS-based lab-on-chip array for combined magnetic manipulation and opto-chemical sensing

Live demonstration: MWC for real-time application

A novel temperature and disturbance insensitive DAC calibration method

An area-efficient TFT-LCD column driver with DAC sharing technique

A 0.7-V 100-µW audio delta-sigma modulator with 92-dB DR in 0.13-µm CMOS

A background calibration for current-steering DAC with current-splitting array

Timing error measurement for highly linear wideband Digital to Analog Converters

A monolithic CMOS MEMS accelerometer with chopper correlated double sampling readout circuit

High voltage protection for USB transceivers in 45nm CMOS

The integrate-and-fire sampler: A special type of asynchronous Σ - Δ modulator

A mostly-digital analog scan-out chain for low bandwidth voltage measurement for analog IP test

Bulk-driven DC level shifter

Leakage Power Analysis attacks: Effectiveness on DPA resistant logic styles under process variations

A dynamic calibration scheme for on-chip process and temperature variations

Validation of and delay variation in total ionizing dose hardened standard cell libraries

IDVP (Intra-Die Variation Probe) for System-On-Chip (SoC) Infant Mortality screen

A Hilbert curve-based delay fault characterization method for FPGAs

A low-leakage parallel CRC generator for ultra-low power applications

Adjacent-State monitoring based fine-grained power-gating scheme for a low-power asynchronous pipelined system

Ultra-low power current-based PUF

Tapered-VTH CMOS buffer design for improved energy efficiency in deep nanometer technology

A novel back-biasing low-leakage technique for FinFET forced stacks

Low power InfomaxICA with compensation strategy for binaural hearing-aid

Integrated transceivers for UWB breast cancer imaging: Architecture and circuit constraints

Improved ultrasound digital beamforming using single-bit sigma-delta modulators with band-pass decimation filters

Compressive sampling of EMG bio-signals

Effects of quantization on neural spike sorting

Modelling, analysis and control of multi-agent systems: A brief overview

Study of near consensus complex social networks using eigen theory

Can stubbornness or gullibility lead to faster consensus? A study of various strategies for reaching consensus in a model of the naming game

A gravity-based A/R model of swarming a multi-agent network with density information

Multi-granularity dynamic analysis of complex software networks

Signal recovery method for compressive sensing using relaxation and second-order cone programming

Analog-to-information conversion of sparse and non-white signals: Statistical design of sensing waveforms

Impulsive noise estimation and cancellation in DSL using compressive sampling

On design of reduced-order ℋ2 filters for discrete repetitive processes

A very efficient single-iteration oldest-out data sorter

A low-complexity parametric transform for image compression

Frame-level dependent bit allocation via geometric programming

Perceptual multiview video coding using synthesized Just Noticeable Distortion maps

Lossless implementation of Daubechies 8-tap wavelet transform

Further results on convergence of cooperative standard cellular neural networks

An active wave computing based path finding approach for 3-D environment

Locally connected processor arrays for matrix multiplication and linear transforms

Collision avoidance for UAV using visual detection

Influence of external input on Oscillatory Cellular Nonlinear Networks dynamics

A 0.7 – 2.6 GHz high-linearity rf front-end for cognitive radio spectrum sensing

Towards suppression of all harmonics in a polyphase multipath transmitter

Advanced filter bank based approach for blocker detection in LTE systems

Architecture and implementation of a Software-Defined Radio baseband processor

A cross-correlation based signal detector with two-step down-converter robust to finite image rejection

A circuit that creates a logarithmic response from an integrating CMOS pixel

Boosted readout for CMOS APS pixels

A very high dynamic range interface circuit for resistive gas sensor matrix read-out

125ppm resolution and 120dB dynamic range nanoparticle chemiresistor array readout circuit

Self-quenching, Forward-bias-reset for Single Photon Avalanche Detectors in 1.8V, 0.18µm process

Skew variability in 3-D ICs with multiple clock domains

Clock distribution models of 3-D integrated systems

CAD tools for designing 3D integrated systems

3D monolithic integration

Thermal analysis and active cooling management for 3D MPSoCs

Parallel memristors: Improving variation tolerance in memristive digital circuits

Time-dependency of the threshold voltage in memristive devices

Experimental analysis of buried SiGe pMOSFETs from the perspective of aggressive voltage scaling

Silicon-on-insulator (SOI) integration for organic field effect transistor (OFET) based circuits

An analytical mismatch model of nano-CMOS device under impact of intrinsic device variability

Analysis and optimization of distributed delay circuits

An optimum linear phase approximation with small delay obtained by the manipulation of all-pass Padé approximants

Effective modeling of CT functions for fast simulations using MATLAB-Simulink and VHDLAMS applied to Sigma-Delta architectures

Analog circuit optimization via a modified Imperialist Competitive Algorithm

A Comprehensive Tapered buffer optimization algorithm for unified design metrics

A novel low voltage Subtracting BandGap Reference with temperature coefficient of 2.2 ppm/°

A nanopower CMOS bandgap reference with 30ppm/degree C from −30 degree C to 150 degree C

A simple CMOS bandgap reference circuit with sub-1-V operation

Low-dropout regulators: Hybrid-cascode compensation to improve stability in nano-scale CMOS technologies

Adjustable input Self-Strobed Delay Line ADC intended to implantable devices

Hardware-efficient parallel FIR digital filter structures for symmetric convolutions

Fault tolerant computing for stream DSP applications using GALS multi-core processors

StreamPoP: Stream programming oriented power-efficient audio DSP

Multi-objective optimization of minority-3 functions for ultra-low voltage supplies

Energy efficient pseudo-cache architecture through fine-grained reconfigurability

Compact lumped element model for TSV in 3D-ICs

The arbiter-PUF with high uniqueness utilizing novel arbiter circuit with Delay-Time Measurement

Evaluation of a distributed fault handler method for MPSoC

A hybrid watermarking scheme for sequential functions

Efficient inductance calculation for long and medium length rectangular interconnects in VLSI circuits

Contactless fluorescence imaging with a CMOS image sensor

Planar microcoils array applied to magnetic beads based lab-on-chip for high throughput applications

A new fully integrated CMOS interface for a dielectrophoretic lab-on-a-chip device

Extending the dynamic range of implantable real-time neurochemical monitoring systems

Attitude sensing system design for wireless Micro-Ball endoscopy

Design rules for Quantum-dot Cellular Automata

Ground-state simulation tool for field-clocked three-state molecular quantum-dot cellular automata (QCA)

Irreversible bit erasures in binary multipliers

A review of magnetic cellular automata systems

QCAPro - An error-power estimation tool for QCA circuit design

Reduced-complexity interpolation-based QR decomposition using partial layer mapping

A reconfigurable baseband processor for wireless OFDM synchronization sub-system

DCD-based simplified matrix inversion for MIMO-OFDM

Compensation of IQ imbalance and transmitter nonlinearities in broadband MIMO-OFDM

An uncoded BER comparison between DFE-SCCP and OFDM using a convex analysis framework

Sparse kernel cepstral coefficients (SKCC): Inner-product based features for noise-robust speech recognition

Pitch-synchronous time alignment of speech signals for prosody transplantation

Adaptive thresholding approach for robust voiced/unvoiced classification

Weighted noise subtraction and adaptive soft-thresholding approach to speech enhancement

Dominant harmonic modification with data adaptive filter based algorithm for robust pitch estimation

Integrate and fire circuit as an ADC replacement

Motion image sensor with on-chip adaptation and Programmable Filtering

Online correction of orientation estimates using spatial memory in a neuromorphic head direction system

Voltage mode driver for low power transmission of high speed serial AER Links

Evaluating on-chip interconnects for low operating frequency silicon neuron arrays

Analog Chirp Fourier Transform for high-resolution real-time wideband RF spectrum Analysis

Reducing spurious PLL tones in spectrum sensing architectures

Low-power FFT design for NC-OFDM in cognitive radio systems

A 0.13µm CMOS 1.5-to-2.15GHz low power transmitter front-end for SDR applications

Reconfigurable filter implementation of a matched-filter based spectrum sensor for Cognitive Radio systems

Estimating the location of a sound source with a spike-timing localization algorithm

Design of a spike event coded RGT microphone for neuromorphic auditory systems

Design of analog audio classifiers with AdaBoost-Based feature selection

A hybrid energy scavenging sensor for long-term mechanical strain monitoring

RF energy harvester design with autonomously adaptive impedance matching network based on auxiliary charge-pump rectifier

Thermal-aware system-level modeling and management for Multi-Processor Systems-on-Chip

Design automation of transistor networks, a new challenge

Hybrid heterogeneous energy supply networks

Pure nodal analysis for efficient on-chip interconnect model order reduction

Stateful logic pipeline architecture

Towards a legged chip

Combining sdm-based circuit switching with packet switching in a NoC for real-time applications

Electrostatic actuation and control of micro robots using a post-processed high-voltage SOI CMOS chip

Leakage current and bottom gate voltage considerations in developing maximum performance 16nm N-channel carbon nanotube transistors

Improved dynamic range, digitally-controlled linear-in-dB CMOS variable gain amplifier

OBT implementation on Gm-C filters without self-tuning capability

An ultra low-power low-voltage programmable temperature detection circuit

An equivalent-time and clocked approach for continuous-time quantization

A hybrid phase-locked loop for CDR Applications

An accurate sense-fet current limiter with embedded softstart for linear dc/dc converters

Supercapacitor-based reconfigurable energy management unit for autonomous wireless sensor nodes

Power management controller for automotive MCU applications in 90nm CMOS technology

Temperature and hump effect impact on output voltage spread of low power bandgap designed in the sub-threshold area

Linear vt-based temperature sensors with low process sensitivity and improved power supply headroom

Hardware synchronization for embedded multi-core processors

Fast hysteretic control of on-chip multi-phase switched-capacitor dc-dc converters

Dynamic jitter accumulation in clock repeaters considering power and ground noise correlations

RIRI scheme: A robust instant-responding ratiochronous interface with zero-latency penalty

A low-power CAM with efficient power and delay trade-off

A novel technique to reduce the metastability of Bang-Bang Phase Frequency Detectors

A tunable soft-error filtering circuit based on programmable-threshold inverters

Analysis of delay mismatching of digital circuits caused by common environmental fluctuations

All-digital PLL array provides reliable distributed clock for SOCs

An on-chip metastability measurement circuit to characterize synchronization behavior in 65nm

Towards an inductively coupled power/data link for bondpad-less silicon chips

Energy-efficient resonant BFSK MICS transmitter with fast-settling dual-loop adaptive frequency locking

A bio-implantable platform for inductive data and power transfer with integrated battery charging

A new omnidirectional wireless power transmission solution for the wireless Endoscopic Micro-Ball

A high-performance analog front-end for an intraoral tongue-operated assistive technology

Adaptive pre-interpolation filter for motion-compensated prediction

Adaptive patch matching for motion compensated prediction

Motion estimation with Second Order Prediction

A novel tracking-by-encoding scheme based on linear programming matching

Source color laser printer identification using discrete wavelet transform and feature selection algorithms

Watermarking schemes in ordered dither block truncation coding

Image quality and lifetime co-optimization in wireless multi-camera systems

A MAXMIN resource allocation approach for scalable video delivery over multiuser MIMO-OFDM systems

Performance study on block-based image steganalysis

Visual attention-based watermarking

Forensic data hiding optimized for JPEG 2000

Image forensic of glare feature for improving image retrieval using Benford's Law

A Cauchy distribution based video watermark detection for H.264/AVC in DCT domain

Information retrieval from large data sets via multiple-winners-take-all

Realtime feature extraction using MAX-like convolutional network for human posture recognition

Stability analysis of SSN biochemical networks

An LMI based state estimator for delayed Hopfield neural networks

A study on resistive-type truncated CVNS Distributed Neural Networks

A novel polynomial selection scheme for low-complexity chase algebraic soft-decision reed-solomon decoding

An area-efficient truncated inversionless Berlekamp-Massey architecture for Reed-Solomon decoders

Memory efficient layered decoder design with early termination for LDPC codes

Memory conflict analysis for a multi-standard, reconfigurable turbo decoder

An area and power efficient pipeline FFT processor for 8×8 MIMO-OFDM systems

Nonsmooth dynamics of electrical systems

Two-fold singularity in nonsmooth electrical systems

Bifurcation study of wind energy generation systems

Trajectory deadlock in power system models

Non-smooth bifurcations in a 1-D piecewise linear model of a Single Inductor Two-Output DC-DC switching converter

Yield-aware template-based layout retargeting for analog integrated circuits

Hierarchical symbolic sensitivity computation with applications to large amplifier circuit design

Optimization of area in digit-serial Multiple Constant Multiplications at gate-level

Parallel multi-level simulation of wireless sensor networks

A novel finite-wordlength particle swarm optimization technique for FRM IIR digital filters

A high gain flatness high linearity down conversion mixer for Ku band application

MPEG-4 codec based uplink resource allocation scheme for the video telephony service in WiBro/WiMAX systems

A pipelined 3-level bandpass delta-sigma modulator for class-S power amplifiers

Analysis of the envelope and the instantaneous phase and frequency of superregenerative oscillators

A power scalable receiver front-end at 2.4 GHz

A grounded-output 5-switch bipolar buck-boost converter topology for switching power amplifiers

A single-stage three-phase high power factor rectifier with high-frequency isolation and regulated DC-bus based on the DCM SEPIC converter

A single stage buck-boost three-phase rectifier with high power factor operating in continuous conduction mode (CCM)

Dynamic oversampling ratio sigma-delta modulation for the control of switching power converter

Maximum drain efficiency class F3 RF power amplifier

A new Temporal-Constraint-Based algorithm by handling temporal qualities for video enhancement

Semi-aperiodic dot diffusion

An image retrieval system using shape salience points

Realistic and interactive image-based rendering of ancient chinese artifacts using a multiple camera array

Fast disparity estimation utilizing depth information for multiview video coding

Embedded system for monitoring the comfort in public transportation

Attentive motion sensor for mobile robotic applications

Effective hand posture recognition system with Hierarchical-Feature Adaboosting and Feature Reserving Average Mask

ETSSI: Energy-based Task Scheduling Simulator for wireless sensor networks

A low-complexity image compression algorithm for Address-Event Representation (AER) PWM image sensors

Hardware implementation of a centroid-based localization algorithm for mobile sensor networks

Linearity analysis of CMOS passive mixer

A relaxation oscillator with multi-phase triangular waveform generation

A 4.2–4.7GHz, 3.7mW digitally controlled oscillator RFIC

A Digitally Controlled Oscillator in a 65-nm CMOS process for SoC clock generation

Analog CMOS circuit implementation of a system of pulse-coupled oscillators for spike-based computation

Process-variation-aware electromagnetic-semiconductor coupled simulation

A novel method of synthesizing reversible logic

Communication-aware design flow for dependable networked embedded systems

Machine-learning framework for automatic netlist creation

A novel representation for repeated placement

A low-spurious fast hopping 12-band synthesizer for dual-carrier MB-OFDM UWB applications

A low-power ESD-protected 24GHz receiver front-end with π-type input matching network

An analog (7,5) convolutional decoder in 65 nm CMOS for low power wireless applications

Understanding dynamic behavior of mm-wave CML divider with injection-locking concept

A 1.93 pA/√Hz transimpedance amplifier for 2.5 Gb/s optical communications

Quasi-hysteretic floating buck LED driver with adaptive off-time for accurate average current control in high brightness lighting

A sub-100nA power management system for wireless structure health monitoring applications

Design of an LFR based on a SEPIC converter under sliding mode control for HBLEDs applications

Distributed residual coding for multi-view video with joint motion vector projection and 3-D warping

Complexity-constrained rate-distortion optimization for h.264/avc video coding

Smoothing rate control for multiple video streams using game theory

Side information extrapolation with temporal and spatial consistency

A scheme of parallel arithmetic coding

A new synthesis methodology for reliable RF front-end Design

Evaluation of a crossbar multiplexer in a lithography-based nanowire technology

A reconfigurable and deadlock-free routing algorithm for 2D Mesh Network-on-Chip

A read-monitored write circuit for 1T1M multi-level memristor memories

Exploiting memristance for low-energy neuromorphic computing hardware

Chaos control in a memristor based circuit

On the trade-off between the number of scrolls and the operating frequency of the chaotic attractors

CMOS interface circuits for reading and writing memristor crossbar array

ISCAS 2011 keyword index

ISCAS 2011 author index

ISCAS 2011 session chair index

Proceedings of 2010 IEEE International Symposium on Circuits and Systems

2009 IEEE International Symposium on Circuits and Systems

2008 IEEE International Symposium on Circuits and Systems

2007 IEEE International Symposium on Circuits and Systems

2006 IEEE International Symposium on Circuits and Systems

2005 IEEE International Symposium on Circuits and Systems

2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.

The IEEE International Symposium on Circuits and Systems, 2003. Tutorial Guide: ISCAS 2003.

2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)

Tutorial Guide. ISCAS 2001. IEEE International Symposium on Circuits and Systems (Cat. No.01TH8573)

ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196)

2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)

ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349)

ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187)

Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97

1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96

Proceedings of ISCAS'95 - International Symposium on Circuits and Systems

Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94

1993 IEEE International Symposium on Circuits and Systems

[Proceedings] 1992 IEEE International Symposium on Circuits and Systems

1991., IEEE International Sympoisum on Circuits and Systems

IEEE International Symposium on Circuits and Systems

IEEE International Symposium on Circuits and Systems,

1988., IEEE International Symposium on Circuits and Systems

A LP/HP UMTS/GSM ΣΔ ADC suited for a Zero-IF/Low-IF receiver

Content Provider	IEEE Xplore Digital Library
Author	Jabbour, C. Khushk, H. Fakhoury, H. Van Tarn Nguyen Loumeau, P.
Copyright Year	2011
Description	Author affiliation: LTCI-CNRS-UMR 5141-Institut TELECOM-TELECOM ParisTech., France (Jabbour, C.; Khushk, H.; Fakhoury, H.; Van Tarn Nguyen; Loumeau, P.)
Abstract	This paper presents the design of a reconfigurable Delta Sigma Analog to Digital Converter (ADC). Its main degree of liberty is the choice of the noise shaping among low pass and high pass. This reconfiguration parameter allows it to be adapted for both the Low-IF and the Zero-If receiver architectures. The ADC is GSM/UMTS compliant. It was designed in a 1.2 V 65 nm CMOS process. Electrical simulation results showed a SNDR of 84 dB for the GSM mode with a Low-IF frequency of 19.2 MHz and a SNDR of 77.4 dB for the UMTS at DC.
Starting Page	1125
Ending Page	1128
File Size	330332
Page Count	4
File Format	PDF
ISBN	9781424494736
ISSN	02714302
e-ISBN	9781424494743
e-ISBN	9781424494729
DOI	10.1109/ISCAS.2011.5937768
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-05-15
Publisher Place	Brazil
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Modulation Noise Switches GSM 3G mobile communication Receivers CMOS integrated circuits Reconfiguration Analog to Digital Converter Delta Sigma Low-IF/Zero-IF receiver
Content Type	Text
Resource Type	Article

Central Library (ISO-9001:2015 Certified)
Indian Institute of Technology Kharagpur
Kharagpur, West Bengal, India | PIN - 721302

See location in the Map
03222 282435
Mail: support@ndl.gov.in

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in